component
TPS26631RGER
Public Made by Adomby adom
Texas Instruments Surge Protection Devices (SPDs), VQFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownTPS26631RGER
Texas Instruments · Surge Protection Devices (SPDs) · VQFN-24(4x4)
TPS26631RGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Power input connecting to the drain of the internal FET; operating range 4.5 V to 60 V. |
| 2 | IN | power_in | Power input connecting to the drain of the internal FET; operating range 4.5 V to 60 V. |
| 3 | B_GATE | output | Blocking FET gate driver output that connects to the gate of the external NFET, or is left floating if no external FET is used. |
| 4 | DRV | output | Blocking FET fast pulldown switch drive that connects to the gate of the external pulldown switch, or is left floating if the external N-FET is not used. |
| 5 | IN_SYS | power_in | Power input and supply voltage of the device, connected to the source of the external blocking FET or shorted to IN if no blocking FET is used. |
| 6 | UVLO | input | Input for setting the programmable undervoltage lockout threshold, with an undervoltage event turning off the internal FET and asserting FLT; connect to GND to select the internal default threshold. |
| 7 | OVP | input | Input for setting the programmable overvoltage protection threshold, with an overvoltage event turning off the internal FET and asserting FLT; connect to GND to select the internal default threshold. |
| 8 | GND | power_in | Connect to system ground. |
| 9 | dVdT | bidirectional | A capacitor from this pin to GND sets the output voltage slew rate. |
| 10 | ILIM | bidirectional | A resistor from this pin to GND sets the overload and short-circuit current limit (recommended 3 to 30 kOhm). |
| 11 | MODE | input | Mode selection pin for overload fault response: open latches off, shorted to GND selects auto-retry. |
| 12 | SHDN | input | Shutdown pin; pulling it low puts the device in low power shutdown, and cycling it resets a latched-off fault. |
| 13 | IMON | output | Analog current monitor output sourcing a scaled-down ratio of the internal FET current (27.9 uA/A typical), converted to voltage by a resistor to GND; leave floating if unused. |
| 14 | FLT | output | Open-drain fault event indicator; leave floating or connect to GND if unused. |
| 15 | PGTH | input | PGOOD comparator input. |
| 16 | PGOOD | output | Active-high power-good output that goes high when PGTH crosses the V(PGTHR) threshold and the internal FET is enhanced; connect to GND or leave floating if unused. |
| 17 | OUT | power_out | Power output of the device. |
| 18 | OUT | power_out | Power output of the device. |
| 19 | N.C | unconnected | No connect. |
| 20 | N.C | unconnected | No connect. |
| 21 | N.C | unconnected | No connect. |
| 22 | N.C | unconnected | No connect. |
| 23 | N.C | unconnected | No connect. |
| 24 | N.C | unconnected | No connect. |
| 25 | PowerPAD | power_in | Connect the PowerPAD to the GND plane for heat sinking; do not use it as the only electrical connection to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-24(4x4) |
| Category | Circuit Protection |
| Pins | 25 |
CAD (KiCad official)
- Symbol:
TPS26631RGER - Footprint:
Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm - 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
- 3D model files:
tps26631rger-etched.step/tps26631rger-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps26631rger.step/tps26631rger.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (60 pp, sha256
63ce6e9453e4499b, retrieved 2026-10-06, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).