TPS259827LNRGET from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN	power_in	Power input; operates over 2.7 V to 24 V (absolute maximum 30 V) and is shared with pins 2, 3, 16 and Pad 1.
2	IN	power_in	Power input; operates over 2.7 V to 24 V (absolute maximum 30 V) and is shared with pins 1, 3, 16 and Pad 1.
3	IN	power_in	Power input; operates over 2.7 V to 24 V (absolute maximum 30 V) and is shared with pins 1, 2, 16 and Pad 1.
4	GND	power_in	Ground; connect to system ground.
5	GND	power_in	Ground; connect to system ground.
6	EN/UVLO	input	Active-high enable; a resistor divider from the input supply to GND adjusts the undervoltage lockout threshold, the pin must not be left floating, and the recommended maximum is 6 V.
7	ITIMER	passive	A capacitor to GND sets the overcurrent blanking interval before the overcurrent response acts; leave open for the fastest response, and shorting it to GND is detected as a fault.
8	ILIM	passive	An external resistor to GND (82 Ω to 1650 Ω recommended) sets the output current limit and fast-trip thresholds; do not leave floating.
9	IMON	output	Analog load current monitor that sources a current proportional to the load current, converted to a voltage by a resistor to GND.
10	RETRY_DLY	passive	A capacitor to GND sets the delay after a fault shutdown before automatic restart; connect to GND for latch-off operation with no auto-retries.
11	NRETRY	passive	A capacitor to GND sets the number of automatic restart attempts after a fault shutdown; connect to GND for indefinite retries.
12	LDSTRT	input	Load detect/handshake input; a capacitor to GND sets the time after PG assertion within which the pin must be pulled low for the device to stay on, connect to GND if unused, do not leave floating.
13	PG	output	Active-high open-drain power-good output that asserts when the FET is fully enhanced and the output has reached maximum voltage, needs an external pull-up (6 V maximum recommended), and stays low when VIN < VUVP.
14	GND	power_in	Ground; connect to system ground.
15	dVdt	passive	A capacitor to GND sets the output turn-on slew rate; leave floating for the fastest start-up slew rate.
16	IN	power_in	Power input; operates over 2.7 V to 24 V (absolute maximum 30 V) and is shared with pins 1, 2, 3 and Pad 1.
17	OUT	power_out	Power output of the eFuse, shared with pins 18 to 24.
18	OUT	power_out	Power output of the eFuse, shared with pins 17 and 19 to 24.
19	OUT	power_out	Power output of the eFuse, shared with pins 17, 18 and 20 to 24.
20	OUT	power_out	Power output of the eFuse, shared with pins 17 to 19 and 21 to 24.
21	OUT	power_out	Power output of the eFuse, shared with pins 17 to 20 and 22 to 24.
22	OUT	power_out	Power output of the eFuse, shared with pins 17 to 21, 23 and 24.
23	OUT	power_out	Power output of the eFuse, shared with pins 17 to 22 and 24.
24	OUT	power_out	Power output of the eFuse, shared with pins 17 to 23.
25	EP	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-24(4x4)
Category	TVS/Fuse/Board Level Protection
Pins	25

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input Voltage Range	VIN	2.7		24	V		7
IN Quiescent Current	IQ		800	1200	µA	VEN ≥ VUVLO(R)	7
IN Shutdown Current	ISD		204	300	µA	VSD < VEN < VUVLO	7
IN Shutdown Current	ISD		3.67	20	µA	VEN < VSD	7
IN Undervoltage Protection Threshold Rising	VUVP	2.46	2.53	2.6	V	VIN Rising	7
IN Undervoltage Protection Threshold Falling	VUVP	2.35	2.42	2.49	V	VIN Falling	7
Current Monitor Gain	GIMON	238.6	246	253.4	µA/A	3 A ≤ IOUT ≤ min(15 A, ILIM), -40 °C ≤ TA ≤ 75 °C	7
Current Limit Threshold	ILIM	1.76	2	2.17	A	RILIM = 773 Ω, TJ = 25 ℃	7
Current Limit Threshold	ILIM	1.53	2	2.43	A	RILIM = 773 Ω, TJ = -40 to 125 ℃	7
Current Limit Threshold	ILIM	4.75	4.98	5.23	A	RILIM = 300 Ω, TJ = 25 ℃	7
Current Limit Threshold	ILIM	4.36	4.98	5.66	A	RILIM = 300 Ω, TJ = -40 to 125 ℃	7
Current Limit Threshold	ILIM	7.77	8.13	8.54	A	RILIM = 182 Ω, TJ = 25 ℃	7
Current Limit Threshold	ILIM	7.23	8.13	9.07	A	RILIM = 182 Ω, TJ = -40 to 125 ℃	7
Current Limit Threshold	ILIM	13.56	14.71	15.66	A	RILIM = 100 Ω, TJ = 25 ℃	7
Current Limit Threshold	ILIM	12.85	14.71	15.99	A	RILIM = 100 Ω, TJ = -40 to 125 ℃	7
ON State Resistance	RON		2.7	3.2	mΩ	TJ = 25 ℃, IOUT = 2 A	7
ON State Resistance	RON			4.5	mΩ	TJ = -40 to 125 ℃, IOUT = 2 A	7
EN/UVLO Rising Threshold	VUVLO(R)	1.18	1.2	1.23	V	VEN Rising	7
EN/UVLO Falling Threshold	VUVLO(F)	1.08	1.1	1.13	V	VEN Falling	7
EN/UVLO Threshold for Lowest Shutdown Current	VSD	0.59		0.8	V	VEN Falling	7
EN/UVLO Pin Leakage Current	IENLKG			0.1	µA		7
PG Pin Low Voltage	VPGD	651		786	mV	VIN < VUVP, VEN < VSD, IPG = 26 µA	7
PG Pin Low Voltage	VPGD			320	mV	VIN = 3.3V, IPG ≤ 5 mA	7
PG Pin Low Voltage	VPGD			100	mV	VIN ≥ 5V, IPG ≤ 5 mA	7
PG Pin Leakage Current	IPGLKG			1.7	µA	PG pulled up to 5 V through 10 kΩ	7
VIN - VOUT Threshold when PG is de-asserted	VPGTHD	0.224	0.326	0.45	V		8
RETRY_DLY Oscillator Hysteresis	VRETRY_DLY_HYS	0.65	0.75	0.85	V		8
RETRY_DLY Pin Bias Current	IRETRY_DLY	1.7	2.05	2.5	µA		8
NRETRY Oscillator Hysteresis	VNRETRY_HYS	0.65	0.75	0.85	V		8
NRETRY Pin Bias Current	INRETRY	1.7	2.05	2.5	µA		8
ITIMER Discharge Current	IITIMER	1.4	2.1	2.8	µA	ISC > IOUT > ILIM	8
ITIMER Comparator Voltage Threshold Delta	ΔVITIMER	0.7	0.98	1.3	V	ISC > IOUT > ILIM, ITIMER Voltage Falling	8
LDSTRT Rising Threshold	VLDSTRT	1.1	1.21	1.3	V	LDSTRT voltage rising	8
LDSTRT Charging Current	ILDSTRT	1.7	2.05	2.4	µA	PG asserted	8
dVdt Pin Charging Current	IdVdt	2	4.6	6.33	µA		8
Short-circuit Fast Trip Threshold	ISC		210		% ILIM		7
RON When PG is asserted	RON(PGA)			4.2	mΩ		7
Thermal Shutdown Threshold	TSD		150		°C	TJ Rising	8
Thermal Shutdown Hysteresis	TSDHys		10		°C	TJ Falling	8
Current Limit Response Time	tLIM		270		µs	IOUT > ILIM + 30% and ITIMER expired to IOUT ≤ ILIM	8
Short Circuit Response Time	tSC		400		ns	IOUT > 3 x ILIM to VOUT turned OFF	8
PG De-glitch	tPGD		120		µs	VG > (VIN + 3.6V) to PG↑ or (VIN - VOUT)> VPGTHD to PG↓	8
Maximum Input Voltage Range	VIN	-0.3		30	V	IN	5
Maximum Output Voltage Range	VOUT	-0.8			V	OUT; max printed as min (30V, VIN + 0.3)	5
Maximum Enable Pin Voltage Range	VEN/UVLO	-0.3		7	V	EN/UVLO	5
Maximum LDSTRT Pin Voltage Range	VLDSTRT			7	V	LDSTRT	5
Maximum PG Pin Voltage Range	VPG	-0.3		7	V	PG	5
Maximum Soldering Temperature	TLEAD			300	°C		5
Storage temperature	Tstg	-65		150	°C		5
ESD HBM	V(ESD)	-2000		2000	V	HBM, all pins	5
ESD CDM	V(ESD)	-1000		1000	V	CDM, all pins	5
Input Voltage Range	VIN	2.7		24	V	IN	6
ILIM Pin Resistor	RILIM	82		1650	Ω	ILIM	6
Continuous Switch Current	IMAX			15	A	IN to OUT	6
Junction temperature	TJ	-40		125	°C		6
Junction-to-ambient thermal resistance	RθJA		34.6		°C/W	RGE (QFN) 24 pins	6
Junction-to-case (top) thermal resistance	RθJC(top)		36.7		°C/W		6
Junction-to-board thermal resistance	RθJB		11.2		°C/W		6
Junction-to-case (bottom) thermal resistance	RθJC(bot)		1.6		°C/W		6

CAD (KiCad official)

Symbol: TPS259827LNRGET
Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
3D model: VQFN-24(4x4) (KiCad packages3D, STEP)

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (56 pp, sha256 b421490ff7dd8b2c, retrieved 2026-10-31, tier: manufacturer)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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TPS259827LNRGET

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