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TPS259822ONRGER

Public Made by Adom

by adom

Texas Instruments Surge Protection Devices (SPDs), QFN-24(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS259822ONRGER

Texas Instruments · Surge Protection Devices (SPDs) · QFN-24(4x4)

TPS259822ONRGER from Texas Instruments, in a QFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Supply input accepting 2.7V to 24V (absolute maximum 30V) with integrated thermal pad for device power distribution and heat dissipation.
2 IN power_in Supply input accepting 2.7V to 24V (absolute maximum 30V) with integrated thermal pad for device power distribution and heat dissipation.
3 IN power_in Supply input accepting 2.7V to 24V (absolute maximum 30V) with integrated thermal pad for device power distribution and heat dissipation.
4 GND power_in Ground reference connection for the device.
5 GND power_in Ground reference connection for the device.
6 EN/UVLO input Enable/UVLO analog input rated 6V maximum with adjustable UVLO threshold (1.2V typical rising, 1.1V typical falling) via external resistor divider to GND; do not leave floating.
7 ITIMER output Overcurrent blanking timer output with internal voltage limiting; external capacitor to GND sets blanking interval; leave open for minimum delay response.
8 ILIM output Current limit threshold output requiring external resistor (82Ω to 1650Ω) to GND to set 2A to 15A current limit and fast-trip threshold; do not leave floating.
9 IMON output Current monitor analog output providing 246 µA/A transimpedance for load current measurement; connect resistor to GND to convert to voltage signal.
10 RETRY_DLY output Automatic retry delay timing output with internal voltage limiting and 2.05 µA bias current; external capacitor to GND sets retry delay interval; connect to GND for latch-off.
11 NRETRY output Automatic retry count output with internal voltage limiting and 2.05 µA bias current; external capacitor to GND sets number of retry attempts after fault shutdown.
12 LDSTRT input Load detect/handshake input with VLDSTRT threshold of 1.21V typical; capacitor to GND sets handshake window after PG assertion to prevent false latch-off; do not leave floating.
13 PG output Power good open-drain output with typical 4.2 mΩ on-resistance when asserted; indicates FET fully enhanced and output at maximum voltage; remains low when VIN < VUVP.
14 GND power_in Ground reference connection for the device.
15 dVdt output Output slew rate control with capacitor voltage rating (VIN + 4V) and 4.6 µA charging current; external capacitor to GND slows rise time; leave floating for fastest slew rate.
16 IN power_in Supply input accepting 2.7V to 24V (absolute maximum 30V) with integrated thermal pad for device power distribution and heat dissipation.
17 OUT power_out Output connection rated up to (VIN + 0.3V) providing regulated power with typical on-resistance of 2.7 mΩ and maximum sustained current of 15A.
18 OUT power_out Output connection rated up to (VIN + 0.3V) providing regulated power with typical on-resistance of 2.7 mΩ and maximum sustained current of 15A.
19 OUT power_out Output connection rated up to (VIN + 0.3V) providing regulated power with typical on-resistance of 2.7 mΩ and maximum sustained current of 15A.
20 OUT power_out Output connection rated up to (VIN + 0.3V) providing regulated power with typical on-resistance of 2.7 mΩ and maximum sustained current of 15A.
21 OUT power_out Output connection rated up to (VIN + 0.3V) providing regulated power with typical on-resistance of 2.7 mΩ and maximum sustained current of 15A.
22 OUT power_out Output connection rated up to (VIN + 0.3V) providing regulated power with typical on-resistance of 2.7 mΩ and maximum sustained current of 15A.
23 OUT power_out Output connection rated up to (VIN + 0.3V) providing regulated power with typical on-resistance of 2.7 mΩ and maximum sustained current of 15A.
24 OUT power_out Output connection rated up to (VIN + 0.3V) providing regulated power with typical on-resistance of 2.7 mΩ and maximum sustained current of 15A.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-24(4x4)
Category Circuit Protection
Pins 25

CAD (KiCad official)

  • Symbol: TPS259822ONRGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps259822onrger-etched.step / tps259822onrger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps259822onrger.step / tps259822onrger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (55 pp, sha256 f4a0f06cfbd81f26, retrieved 2026-10-05, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF