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Ray Initial commit: component/tps259822lnrget d5880e3 29d ago

TPS259822LNRGET

Texas Instruments · Surge Protection Devices (SPDs) · VQFN-24(4x4)

TPS259822LNRGET from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Power input to the eFuse; the operating supply range is 2.7 V to 24 V, with an absolute maximum of 30 V.
2 IN power_in Power input to the eFuse; the operating supply range is 2.7 V to 24 V, with an absolute maximum of 30 V.
3 IN power_in Power input to the eFuse; the operating supply range is 2.7 V to 24 V, with an absolute maximum of 30 V.
4 GND power_in Ground reference for all internal signals; connect to the system ground.
5 GND power_in Ground reference for all internal signals; connect to the system ground.
6 EN/UVLO input Active-high enable with adjustable undervoltage lockout; a resistor divider from IN to GND sets the UVLO threshold, the pin must not be left floating, and the pin voltage is limited to 6 V in recommended operation (7 V absolute maximum).
7 ITIMER output A capacitor to GND sets the overcurrent blanking interval before the device responds; leaving the pin open gives the fastest response, and shorting it to GND is detected as a fault that shuts the device down.
8 ILIM output A resistor to GND sets the output current limit and fast-trip threshold, with RILIM recommended between 82 Ω and 1650 Ω; the pin must not be left floating, and an open or GND-shorted ILIM pin is treated as a fault.
9 IMON output Analog load-current monitor that sources a current proportional to load current (gain 246 µA/A typical); a resistor to GND converts it to a voltage.
10 RETRY_DLY output A capacitor to GND sets the delay after a fault shutdown before the device attempts an automatic restart; connecting this pin to GND selects latch-off with no automatic retry.
11 NRETRY output A capacitor to GND sets the number of automatic restart attempts after a fault shutdown; connecting this pin to GND selects unlimited retries.
12 LDSTRT input Load-detect/handshake input; a capacitor to GND sets the window after PG asserts in which the load must pull this pin low (rising threshold 1.1 V to 1.3 V), and the pin must be tied to GND if the function is unused and must not be left floating.
13 PG output Active-high open-drain power-good output that needs an external pull-up, is held low when VIN is below VUVP, and is recommended to be pulled up to no more than 6 V.
14 GND power_in Ground reference for all internal signals; connect to the system ground.
15 dVdt output A capacitor to GND sets the output turn-on slew rate, with the capacitor recommended for a voltage rating of VIN + 4 V; leaving the pin open gives the fastest slew rate during start-up.
16 IN power_in Power input to the eFuse; the operating supply range is 2.7 V to 24 V, with an absolute maximum of 30 V.
17 OUT power_out Switched power output from the internal FET to the load; the IN-to-OUT continuous switch current is rated 15 A.
18 OUT power_out Switched power output from the internal FET to the load; the IN-to-OUT continuous switch current is rated 15 A.
19 OUT power_out Switched power output from the internal FET to the load; the IN-to-OUT continuous switch current is rated 15 A.
20 OUT power_out Switched power output from the internal FET to the load; the IN-to-OUT continuous switch current is rated 15 A.
21 OUT power_out Switched power output from the internal FET to the load; the IN-to-OUT continuous switch current is rated 15 A.
22 OUT power_out Switched power output from the internal FET to the load; the IN-to-OUT continuous switch current is rated 15 A.
23 OUT power_out Switched power output from the internal FET to the load; the IN-to-OUT continuous switch current is rated 15 A.
24 OUT power_out Switched power output from the internal FET to the load; the IN-to-OUT continuous switch current is rated 15 A.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24(4x4)
Category Circuit Protection
Pins 25

CAD (KiCad official)

  • Symbol: TPS259822LNRGET
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps259822lnrget-etched.step / tps259822lnrget-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps259822lnrget.step / tps259822lnrget.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (55 pp, sha256 f4a0f06cfbd81f26, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF