component

TPS259620DDAR

Public Made by Adom

by adom

Texas Instruments Current Source / Constant Current Source, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps259620ddarfactory-2.0.0extractor-text

Verified TPS259620DDAR

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: TPS259620DDAR · SO-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 47-page datasheet
  • ✓distributor: lcsc C2155773, digikey 296-TPS259620DDARTR-ND, mouser 595-TPS259620DDAR
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-aunazz13/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ tps259620ddar.kicad_sym✓ tps259620ddar.kicad_mod✓ tps259620ddar.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 19h ago
viewers tps259620ddar: viewers · Ray 19h ago
package.json Publish 0.1.0 · Ray 19h ago
page.json Set visibility: public · Ray 19h ago
README.md Publish 0.1.0 · Ray 19h ago
tps259620ddar-etched.glb Publish 0.1.0 · Ray 19h ago
tps259620ddar-etched.step tps259620ddar: factory component page (tier=mfr) · Ray 19h ago
tps259620ddar-hero.glb tps259620ddar: hero GLB from the etched model (keeps the MPN mark) · Ray 19h ago
tps259620ddar-hero.overlay.json Publish 0.1.0 · Ray 19h ago
tps259620ddar.glb Publish 0.1.0 · Ray 19h ago
tps259620ddar.kicad_mod Publish 0.1.0 · Ray 19h ago
tps259620ddar.kicad_sym Publish 0.1.0 · Ray 19h ago
tps259620ddar.lbr Publish 0.1.0 · Ray 19h ago
tps259620ddar.step Publish 0.1.0 · Ray 19h ago
verification.json Verified: Published by the parts factory: tier mfr, 8 pins · Ray 19h ago

TPS259620DDAR

Texas Instruments · Current Source / Constant Current Source · SO-8

TPS259620DDAR from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference pin for the device.
2 dVdt output A capacitor from this pin to GND sets the output turn-on slew rate, and the pin must be left floating for the fastest turn-on slew rate; the capacitor voltage rating is 4 V.
3 EN/UVLO input Active high enable input with an optional resistor divider to set the undervoltage lockout threshold; the pin must not be left floating and its absolute maximum voltage is 7 V.
4 IN power_in Power input; the input voltage range is 2.7 V to 19 V with 21 V absolute maximum.
5 OUT power_out Power output to the protected load, driven through the internal FET from IN.
6 FLT output Active low open-drain fault indicator that is pulled low when a fault is detected and requires an external pull-up resistor; maximum sink current is 10 mA.
7 ILM output Dual-function pin that sets the output current limit through an external resistor to GND (RILM 453 Ω to 7869 Ω) and provides a voltage proportional to the output load current for monitoring.
8 OVLO/OVCSEL input For TPS25962x this pin selects the overvoltage clamp level (shorted to GND 3.8 V, 400 kΩ to GND 5.7 V, open 13.7 V typical) and must not be left floating.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SO-8
Category Power Management (PMIC)
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input Voltage Range VIN 2.7 19 V 5
Maximum Input Voltage Range VIN -0.3 21 V 5
Maximum Input Voltage Range VIN 22 V TA = 25 ℃ 5
Maximum Enable Pin Voltage Range VEN/UVLO -0.3 7 V 5
Enable Pin Voltage Range VEN/UVLO 6 V 5
Maximum OVCSEL/OVLO Pin Voltage Range VOV -0.3 7 V 5
Maximum dVdT Pin Voltage Range VdVdT 2.5 V 5
dVdT Pin Capacitor Voltage Rating VdVdT 4 V 5
FLTB Pin Voltage Range VFLTB 6 V 5
Maximum FLTb Pin Voltage Range VFLTB -0.3 7 V 5
Maximum FLTb Pin Sink Current IFLTB 10 mA 5
ILM Pin Resistance RILM 453 7869 Ω 5
Continuous Switch Current IN to OUT IMAX 2 A 5
Junction temperature TJ -40 125 °C 5
Storage temperature Tstg -65 150 °C 5
Maximum Lead Temperature TLEAD 300 °C 5
Junction-to-ambient thermal resistance RθJA 52.7 °C/W With exposed pad soldered to PCB 6
Junction-to-ambient thermal resistance RθJA 119.8 °C/W Without exposed pad soldered to PCB 6
Junction-to-top characterization parameter ΨJT 8.9 °C/W With exposed pad soldered to PCB 6
Junction-to-top characterization parameter ΨJT 17.5 °C/W Without exposed pad soldered to PCB 6
Junction-to-board characterization parameter ΨJB 27.1 °C/W With exposed pad soldered to PCB 6
Junction-to-board characterization parameter ΨJB 68.1 °C/W Without exposed pad soldered to PCB 6
IN quiescent current IQ 206 266 µA TPS25962x 6
IN Shutdown Current ISD 0.4 1.132 µA VIN ≥ 4 V, VEN/UVLO < VSD 6
IN Undervoltage Protection threshold VUVP(R) 2.46 2.53 2.58 V VIN Rising 6
IN Undervoltage Protection threshold VUVP(F) 2.36 2.42 2.46 V VIN Falling 6
Overvoltage Clamp Threshold VOVC 3.75 3.83 3.92 V ROVCSEL = Short to GND, ROUT = 10 KΩ 6
Overvoltage Clamp Threshold VOVC 5.54 5.69 5.83 V ROVCSEL = 400 KΩ to GND, ROUT = 10 KΩ 6
Overvoltage Clamp Threshold VOVC 12.97 13.77 14.52 V ROVCSEL = OPEN, ROUT = 10 KΩ 6
Output Voltage During Clamping VCLAMP 3.47 3.59 3.7 V ROVCSEL = Short to GND, IOUT = 10 mA 6
Output Voltage During Clamping VCLAMP 5.28 5.45 5.61 V ROVCSEL = 400 KΩ to GND, IOUT = 10 mA 6
Output Voltage During Clamping VCLAMP 13.13 13.58 13.97 V ROVCSEL = OPEN, IOUT = 10 mA 6
Current monitor gain as measured on ILM pin (IILM / IOUT) GIMON 531.22 653.21 800 µA/A IOUT = 0.13 A 6
Current monitor gain as measured on ILM pin (IILM / IOUT) GIMON 635.77 657.15 684.05 µA/A IOUT = 2 A 6
IOUT Current Limit ILIM 0.113 0.125 0.139 A RILM = 7.87 KΩ, VDS = 0.5 V, -40°C ≤ TA ≤ 80°C 6
IOUT Current Limit ILIM 0.224 0.247 0.269 A RILM = 3.83 KΩ, VDS = 0.5 V 6
IOUT Current Limit ILIM 0.949 1.005 1.051 A RILM = 909 Ω, VDS = 0.5 V 6
IOUT Current Limit ILIM 1.83 2.004 2.147 A RILM = 453 Ω, VDS = 0.5 V 6
ON State Resistance RON 97 99.8 mΩ VIN < 4 V, IOUT = 0.2 A, TJ = 25 ℃ 7
ON State Resistance RON 125.4 mΩ VIN < 4 V, IOUT = 0.2 A, TJ = -40 to 85 ℃ 7
ON State Resistance RON 143.4 mΩ VIN < 4 V, IOUT = 0.2 A, TJ = -40 to 125 ℃ 7
ON State Resistance RON 89 92.6 mΩ VIN > 4 V, IOUT = 0.2 A, TJ = 25 ℃ 7
ON State Resistance RON 115.3 mΩ VIN > 4 V, IOUT = 0.2 A, TJ = -40 to 85 ℃ 7
ON State Resistance RON 131 mΩ VIN > 4 V, IOUT = 0.2 A, TJ = -40 to 125 ℃ 7
UVLO Threshold VUVLO(R) 1.18 1.2 1.22 V VEN Rising 7
UVLO Threshold VUVLO(F) 1.08 1.1 1.13 V VEN Falling 7
EN leakage current IENLKG -0.1 0.1 µA 7
FLT pin leakage current IFLTLKG -1 1 µA FLT de-asserted, pull-up voltage 6 V 7
dVdt Pin Charging Current IDVDT 1.89 2.11 2.33 µA 7
DVDT gain GDVDT 20.31 20.93 21.5 V 7

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
contacts copper • The GND terminal must be tied to the PCB ground plane at the terminal of the IC. The PCB ground must be a copper plane or island on the board. 36

CAD (KiCad official)

  • Symbol: TPS259620DDAR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: tps259620ddar-etched.step / tps259620ddar-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps259620ddar.step / tps259620ddar.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (47 pp, sha256 66f6bae4494f7bfe, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF