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Contents

Pinout
Key specifications
Electrical characteristics
CAD (KiCad official)
Provenance

README

markdown

TPS25944ARVCR

Texas Instruments · Monitors & Reset Circuits · WQFN-20-EP(3x4)

TPS25944ARVCR from Texas Instruments, in a WQFN-20-EP(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	DMODE	input	Diode mode control pin, where a high level activates the non-ideal diode mode; EN, OVP, DMODE, OUT, PGTH, PGOOD and FLT are rated 0 V to 18 V recommended and 20 V absolute maximum.
2	PGOOD	output	Active-high open-drain power-good output that goes high when PGTH has crossed its threshold, with a 10 mA maximum sink current.
3	PGTH	input	Positive input of the PGOOD comparator, rated 0 V to 18 V recommended.
4	OUT	power_out	Power output of the device, requiring at least 0.1 µF of external capacitance and rated 0 V to 18 V recommended.
5	OUT	power_out	Power output of the device (grouped with pins 4 to 8 in the datasheet table), requiring at least 0.1 µF of external capacitance.
6	OUT	power_out	Power output of the device (grouped with pins 4 to 8 in the datasheet table), requiring at least 0.1 µF of external capacitance.
7	OUT	power_out	Power output of the device (grouped with pins 4 to 8 in the datasheet table), requiring at least 0.1 µF of external capacitance.
8	OUT	power_out	Power output of the device (grouped with pins 4 to 8 in the datasheet table), requiring at least 0.1 µF of external capacitance.
9	IN	power_in	Power input and supply voltage, recommended 2.7 V to 18 V with 20 V maximum (22 V for 10 ms transient).
10	IN	power_in	Power input and supply voltage (grouped with pins 9 to 13 in the datasheet table), recommended 2.7 V to 18 V.
11	IN	power_in	Power input and supply voltage (grouped with pins 9 to 13 in the datasheet table), recommended 2.7 V to 18 V.
12	IN	power_in	Power input and supply voltage (grouped with pins 9 to 13 in the datasheet table), recommended 2.7 V to 18 V.
13	IN	power_in	Power input and supply voltage (grouped with pins 9 to 13 in the datasheet table), recommended 2.7 V to 18 V.
14	EN/UVLO	input	Sets the programmable undervoltage lockout threshold; an undervoltage event opens the internal FET and asserts FLT, and pulling it to GND resets the fault latch on the TPS25942L/TPS25944L.
15	OVP	input	Sets the programmable overvoltage protection threshold; an overvoltage event opens the internal FET and asserts FLT to indicate overvoltage.
16	GND	power_in	Ground pin, which must be connected to the exposed PowerPAD and then to a PCB ground plane using multiple vias.
17	ILIM	bidirectional	A resistor from this pin to GND sets the overload and short-circuit current limit, with 16.9 kΩ to 150 kΩ recommended and 3 V maximum on the pin.
18	dVdT	bidirectional	A capacitor from this pin to GND sets the output voltage ramp rate, with 470 nF maximum recommended and 10 mA maximum sink current.
19	IMON	output	Sources a scaled-down ratio of the internal FET current, and a resistor from this pin to GND converts it to a proportional voltage for analog current monitoring, rated 0 V to 6 V recommended.
20	FLT	output	Open-drain fault indicator that goes low for undervoltage, overvoltage, reverse voltage, circuit breaker timeout (TPS25944 only) and thermal shutdown, rated 0 V to 18 V recommended.
21	PowerPAD	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	WQFN-20-EP(3x4)
Category	Power Management ICs
Pins	21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input voltage (IN, OUT, PGTH, PGOOD, EN, OVP, DMODE, FLT)		-0.3		20	V		6
IN (10-ms transient)				22	V	10-ms transient	6
dVdT, ILIM voltage		-0.3		3.6	V		6
IMON voltage		-0.3		7	V		6
Sink current PGOOD, FLT, dVdT				10	mA		6
Maximum junction temperature	TJ	-40		150	°C		6
Storage temperature	Tstg	-65		150	°C		6
Input voltage IN		2.7		18	V		6
Input voltage EN, OVP, DMODE, OUT, PGTH, PGOOD, FLT		0		18	V		6
dVdT, ILIM voltage		0		3	V		6
IMON voltage		0		6	V		6
Resistance ILIM		16.9		150	kΩ		6
Operating junction temperature	TJ	-40	25	125	°C		6
Operating input voltage	V(IN)	2.7		18	V		7
Internal UVLO threshold, rising	V(UVR)	2.2	2.3	2.4	V		7
Internal UVLO hysteresis	V(UVRhys)	105	116	125	mV		7
Supply current, enabled	IQ(ON)	140	210	300	µA	V(EN/UVLO) = 2 V, V(IN) = 3 V	7
Supply current, enabled	IQ(ON)	140	199	260	µA	V(EN/UVLO) = 2 V, V(IN) = 12 V	7
Supply current, enabled	IQ(ON)	140	202	270	µA	V(EN/UVLO) = 2 V, V(IN) = 18 V	7
Supply current, disabled	IQ(OFF)	4	8.6	15	µA	V(EN/UVLO) = 0 V, V(IN) = 3 V	7
Supply current, disabled	IQ(OFF)	6	15	20	µA	V(EN/UVLO) = 0 V, V(IN) = 12 V	7
Supply current, disabled	IQ(OFF)	8	18.5	25	µA	V(EN/UVLO) = 0 V, V(IN) = 18 V	7
EN/UVLO threshold voltage, rising	V(ENR)	0.97	0.99	1.01	V		7
EN/UVLO threshold voltage, falling	V(ENF)	0.9	0.92	0.94	V		7
EN threshold voltage for low IQ shutdown, falling	V(SHUTF)	0.3	0.47	0.63	V		7
Overvoltage threshold voltage, rising	V(OVPR)	0.97	0.99	1.01	V		7
Overvoltage threshold voltage, falling	V(OVPF)	0.9	0.92	0.94	V		7
DMODE threshold voltage, rising	V(DMODE)	1.6	1.85	2	V		7
DMODE threshold voltage, falling	V(DMODE)	0.8	0.96	1.1	V		7
DMODE input leakage current	I(DMODE)	0.6	1	1.25	µA	0.2 V ≤ V(DMODE) ≤ 18 V	7
dVdT charging current	I(dVdT)	0.85	1	1.15	µA	V(dVdT) = 0 V	7
dVdT discharging resistance	R(dVdT)	16		24	Ω	EN/UVLO = 0 V, I(dVdT) = 10 mA sinking	7
dVdT maximum capacitor voltage	V(dVdTmax)	2.6	2.88	3.1	V		7
dVdT to OUT gain	GAIN(dVdT)	11.65	11.9	12.05	V/V		7
Current limit, R(ILIM) = 150 kΩ	I(FAULT)	0.53	0.58	0.63	A	R(ILIM) = 150 kΩ, (V(IN), V(OUT)) = 1 V	8
Current limit, R(ILIM) = 88.7 kΩ	I(FAULT)	0.9	0.99	1.07	A	R(ILIM) = 88.7 kΩ, (V(IN), V(OUT)) = 1 V	8
Current limit, R(ILIM) = 42.2 kΩ	I(FAULT)	1.92	2.08	2.25	A	R(ILIM) = 42.2 kΩ, (V(IN), V(OUT)) = 1 V	8
Current limit, R(ILIM) = 24.9 kΩ	I(FAULT)	3.25	3.53	3.81	A	R(ILIM) = 24.9 kΩ, (V(IN), V(OUT)) = 1 V	8
Current limit, R(ILIM) = 20 kΩ	I(FAULT)	4.09	4.45	4.81	A	R(ILIM) = 20 kΩ, (V(IN), V(OUT)) = 1 V	8
Current limit, R(ILIM) = 16.9 kΩ	I(FAULT)	4.78	5.2	5.62	A	R(ILIM) = 16.9 kΩ, (V(IN), V(OUT)) = 1 V	8
Current limit, R(ILIM) open	I(FAULT)	0.35	0.45	0.55	A	R(ILIM) = OPEN, open resistor current limit (single point failure test: UL60950)	8
Current limit, R(ILIM) shorted	I(FAULT)	0.55	0.67	0.8	A	R(ILIM) = SHORT, shorted resistor current limit (single point failure test: UL60950)	8
Short-circuit current limit	I(OS)	1.91	2.07	2.24	A	R(ILIM) = 42.2 kΩ, V(VIN) = 12 V, (V(IN), V(OUT)) = 5 V	8
Short-circuit current limit	I(OS)	3.21	3.49	3.77	A	R(ILIM) = 24.9 kΩ, V(VIN) = 12 V, (V(IN), V(OUT)) = 5 V	8
Short-circuit current limit	I(OS)	4.7	5.11	5.52	A	R(ILIM) = 16.9 kΩ, V(VIN) = 12 V, (V(IN), V(OUT)) = 5 V, -40°C ≤ TJ ≤ +85°C	8
Gain factor I(IMON):I(OUT)	GAIN(IMON)	47.78	52.3	57.23	µA/A	1 A ≤ I(OUT) ≤ 5 A	8
IN to OUT ON resistance	RON	34	42	49	mΩ	1 A ≤ I(OUT) ≤ 5 A, TJ = 25°C	8
IN to OUT ON resistance	RON	26	42	58	mΩ	1 A ≤ I(OUT) ≤ 5 A, -40°C ≤ TJ ≤ +85°C	8
IN to OUT ON resistance	RON	26	42	64	mΩ	1 A ≤ I(OUT) ≤ 5 A, -40°C ≤ TJ ≤ +125°C	8
OUT leakage current in off state, sourcing	Ilkg(OUT)	-2	0	2	µA	V(IN) = 18 V, V(EN/UVLO) = 0 V, V(OUT) = 0 V (sourcing)	8
OUT leakage current in off state, sinking	Ilkg(OUT)	6	13	20	µA	V(IN) = 2.7 V, V(EN/UVLO) = 0 V, V(OUT) = 18 V (sinking)	8
V(IN), V(OUT) threshold for reverse protection comparator, falling	V(REVTH)	-15	-9.3	-3	mV		8
V(IN), V(OUT) threshold for reverse protection comparator, rising	V(FWDTH)	86	100	114	mV		8
FLT internal pull-down resistance	R(FLT)	10	18	30	Ω	V(OVP) = 2 V, I(FLT) = 5 mA sinking	8
PGTH threshold voltage, rising	V(PGTHR)	0.97	0.99	1.01	V		8
PGTH threshold voltage, falling	V(PGTHF)	0.9	0.92	0.94	V		8
Output ramp time, EN/UVLO rising to V(OUT) = 11 V	tdVdT	0.25	0.37	0.5	ms	EN/UVLO ↑ to V(OUT) = 11 V, with C(dVdT) = open	9
Junction-to-ambient thermal resistance	RθJA		38.1		°C/W		6
Junction-to-board thermal resistance	RθJB		13.6		°C/W		6
Junction-to-case (bottom) thermal resistance	RθJCbot		3.4		°C/W		7

CAD (KiCad official)

Symbol: TPS25944ARVCR
Footprint: Package_DFN_QFN:QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm
3D model: WQFN-20-EP(3x4) (KiCad packages3D, STEP)
3D model files: tps25944arvcr-etched.step / tps25944arvcr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps25944arvcr.step / tps25944arvcr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (56 pp, sha256 11ee4de5549f6957, retrieved 2026-10-29, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF