component
TPS25942ARVCR
Public Made by Adomby adom
Texas Instruments Battery Management, QFN-20-EP(3x4). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS25942ARVCR
Texas Instruments · Battery Management · QFN-20-EP(3x4)
TPS25942ARVCR from Texas Instruments, in a QFN-20-EP(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DMODE | input | Diode Mode control pin. A logic high activates the non-ideal diode mode, blocking reverse current flow from OUT to IN. |
| 2 | PGOOD | output | Active-high open-drain power-good indicator. Asserts high when PGTH has crossed its threshold, indicating output is in regulation. Requires an external pull-up resistor. |
| 3 | PGTH | input | Positive input of the PGOOD comparator. Typically driven from a resistor divider off VOUT to set the power-good threshold. |
| 4 | OUT | power_out | Power output of the device (drain of internal back-to-back FETs). Pins 4-8 are internally tied and must all be connected for 5 A rated current. |
| 5 | OUT | power_out | Power output of the device. Tie together with pins 4, 6, 7, 8. |
| 6 | OUT | power_out | Power output of the device. Tie together with pins 4, 5, 7, 8. |
| 7 | OUT | power_out | Power output of the device. Tie together with pins 4, 5, 6, 8. |
| 8 | OUT | power_out | Power output of the device. Tie together with pins 4-7. |
| 9 | IN | power_in | Power input and supply voltage, 2.7 V to 18 V (20 V max). Pins 9-13 are internally tied and must all be connected for 5 A rated current. |
| 10 | IN | power_in | Power input and supply voltage. Tie together with pins 9, 11, 12, 13. |
| 11 | IN | power_in | Power input and supply voltage. Tie together with pins 9, 10, 12, 13. |
| 12 | IN | power_in | Power input and supply voltage. Tie together with pins 9, 10, 11, 13. |
| 13 | IN | power_in | Power input and supply voltage. Tie together with pins 9-12. |
| 14 | EN/UVLO | input | Enable / programmable undervoltage lockout input. A resistor divider from VIN sets the UVLO threshold; a UV event opens the internal FET and asserts /FLT. Pulling to GND resets the fault latch on TPS25942L / TPS25944L. |
| 15 | OVP | input | Programmable overvoltage protection threshold input. Set with a resistor divider from VIN; an OV event opens the internal FET and asserts /FLT. |
| 16 | GND | power_in | Device ground reference. Must be connected to the exposed PowerPAD. |
| 17 | ILIM | passive | Current-limit programming pin. A resistor from ILIM to GND (R_ILIM ≥ 20 kΩ, 4.81 A max) sets the overload and short-circuit current limit (0.6 A to 5.3 A ±8%). |
| 18 | dVdT | passive | Output slew-rate programming pin. A capacitor from dVdT to GND sets the ramp rate of the output voltage during turn-on / hot-plug. |
| 19 | IMON | output | Analog current monitor output. Sources a scaled-down replica (±8%) of the current flowing through the internal FET; a resistor to GND converts it to a proportional voltage. |
| 20 | /FLT | output | Active-low open-drain fault indicator. Asserts on undervoltage, overvoltage, reverse voltage, circuit-breaker timeout (TPS25944 only), and thermal shutdown. Requires an external pull-up resistor. |
| PAD | PowerPAD | power_in | Exposed thermal pad on package bottom. Must be tied to GND (pin 16) and connected to the PCB ground plane through multiple thermal vias for rated thermal performance. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | QFN-20-EP(3x4) |
| Category | PMIC |
| Pins | 21 |
Ordering variants
Same part, different packaging or reel option.
TPS25942ARVCRTPS25942ARVCRRVCT
CAD (KiCad official)
- Symbol:
TPS25942ARVCR - Footprint:
Package_DFN_QFN:QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm - 3D model: QFN-20-EP(3x4) (KiCad packages3D, STEP)
- 3D model files:
tps25942arvcr-etched.step/tps25942arvcr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps25942arvcr.step/tps25942arvcr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (56 pp, sha256
11ee4de5549f6957, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).