component
TPS259401AQRVCRQ1
Public Made by Adomby adom
Texas Instruments Battery Management, WQFN-20-EP(3x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS259401AQRVCRQ1
Texas Instruments · Battery Management · WQFN-20-EP(3x4)
TPS259401AQRVCRQ1 from Texas Instruments, in a WQFN-20-EP(3x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DEVSLP | input | Active-high DevSleep mode control; logic high activates low-power mode (IQ ≤ 130 µA, typ. 95 µA); V(DEVSLPR) rising threshold 1.6-2.0 V; leave floating or tie to GND if unused. |
| 2 | PGOOD | output | Active-high open-drain power-good output; asserts high when PGTH exceeds V(PGTHR) = 0.97-1.01 V and internal FET is fully enhanced; internal pull-down R(PGOOD) = 10-35 Ω; max sink current 10 mA; leave floating if unused. |
| 3 | PGTH | input | Positive input to power-good comparator referenced to internal V(PGTHR) = 0.99 V (typ.) at the negative terminal; input leakage ±100 nA max (0-18 V); connect to OUT or GND if unused. |
| 4 | OUT | power_out | Power output of the device (one of five paralleled OUT pins); RON = 42 mΩ typ / 64 mΩ max (-40°C to +125°C) across IN-to-OUT; maximum continuous switch current 4.78 A at TA = 85°C; all OUT pins must be tied together. |
| 5 | OUT | power_out | Power output of the device (one of five paralleled OUT pins); see pin 4 for electrical limits; all OUT pins must be tied together. |
| 6 | OUT | power_out | Power output of the device (one of five paralleled OUT pins); see pin 4 for electrical limits; all OUT pins must be tied together. |
| 7 | OUT | power_out | Power output of the device (one of five paralleled OUT pins); see pin 4 for electrical limits; all OUT pins must be tied together. |
| 8 | OUT | power_out | Power output of the device (one of five paralleled OUT pins); see pin 4 for electrical limits; all OUT pins must be tied together. |
| 9 | IN | power_in | Power input and supply voltage of the device (one of five paralleled IN pins); recommended operating range 2.7-18 V; absolute maximum 20 V DC (22 V for 10 ms transient); all IN pins must be tied together. |
| 10 | IN | power_in | Power input and supply voltage (one of five paralleled IN pins); see pin 9 for voltage limits; all IN pins must be tied together. |
| 11 | IN | power_in | Power input and supply voltage (one of five paralleled IN pins); see pin 9 for voltage limits; all IN pins must be tied together. |
| 12 | IN | power_in | Power input and supply voltage (one of five paralleled IN pins); see pin 9 for voltage limits; all IN pins must be tied together. |
| 13 | IN | power_in | Power input and supply voltage (one of five paralleled IN pins); see pin 9 for voltage limits; all IN pins must be tied together. |
| 14 | EN/UVLO | input | Enable and programmable undervoltage lockout input; voltage below V(ENF) = 0.90-0.94 V turns off internal FET and asserts FLT; below V(SHUTF) = 0.3-0.63 V enters shutdown (IQ < 15 µA); must not be left floating. |
| 15 | OVP | input | Overvoltage protection threshold input; external resistor divider from supply programs OVP trip point; V(OVPR) rising threshold 0.97-1.01 V; overvoltage event opens internal FET and asserts FLT; tie to GND when unused. |
| 16 | GND | power_in | Ground reference for all signals; must be connected to the exposed PowerPAD (pin 21); PowerPAD must be soldered to PCB ground plane through multiple vias for thermal performance; RθJCbot = 3.4 °C/W. |
| 17 | ILIM | bidirectional | Current-limit programming pin (I/O); resistor from this pin to GND sets overload and short-circuit current limit via I(LIM) = 89 kΩ / R(ILIM); V(ILIM) bias = 0.87 V (typ.); R(ILIM) range 16.9-150 kΩ; route away from switching signals. |
| 18 | dVdT | bidirectional | Output slew-rate control pin (I/O); capacitor from this pin to GND sets V(OUT) ramp rate via I(dVdT) = 1 µA internal charging current and GAIN(dVdT) = 11.9 V/V (typ.); V(dVdTmax) = 2.6-3.1 V; leave floating for internal 30 V/ms default ramp. |
| 19 | IMON | output | Analog current monitor output; sources a current proportional to I(OUT) at GAIN(IMON) = 52.3 µA/A (typ.); resistor to GND converts to voltage; V(IMON) must not exceed min(V(IN) - 2.2 V, 6 V); no bypass capacitor permitted; leave floating if unused. |
| 20 | FLT | output | Active-low open-drain fault indicator; asserts low during undervoltage, overvoltage, reverse voltage (V(IN) - V(OUT) < -66 mV typ.), or thermal shutdown; internal pull-down R(FLT) = 10-30 Ω; V(IN) below 2.1 V resets FLT; connect through external pull-up resistor if used. |
| 21 | EP | power_in | Exposed thermal PowerPAD; electrically GND potential; must be soldered to PCB ground plane for optimal thermal and mechanical performance; RθJCbot = 3.4 °C/W; connect to inner-layer GND planes through multiple vias. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WQFN-20-EP(3x4) |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS259401AQRVCRQ1 - Footprint:
Package_DFN_QFN:QFN-20-1EP_3x4mm_P0.5mm_EP1.65x2.65mm - 3D model: WQFN-20-EP(3x4) (KiCad packages3D, STEP)
- 3D model files:
tps259401aqrvcrq1-etched.step/tps259401aqrvcrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps259401aqrvcrq1.step/tps259401aqrvcrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (51 pp, sha256
a1b7de698cb52759, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).