component
TPS25921LD
Public Made by Adomby adom
Texas Instruments Surge Protection Devices (SPDs), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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TPS25921LD
Texas Instruments · Surge Protection Devices (SPDs) · SOIC-8
TPS25921LD from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference pin for the device. |
| 2 | SS | passive | A capacitor from this pin to GND sets the output voltage ramp rate at turn-on, with 1 nF to 1000 nF recommended and 0 to 6 V recommended operating range (sink current limited to 5 mA). |
| 3 | ENUV | input | Input for setting the programmable undervoltage lockout threshold; an undervoltage event opens the internal FET and asserts FLT, and pulling it to GND resets the thermal fault latch in the TPS25921L, with a recommended range of 0 to 18 V. |
| 4 | IN | power_in | Power input and supply voltage of the device, with a recommended range of 4.5 V to 18 V and an absolute maximum of 20 V (22 V for 10 ms transient). |
| 5 | OUT | power_out | Power output of the device, with a recommended operating range of 0 to 18 V and 0.1 µF to 1 µF external capacitance recommended. |
| 6 | FLT | output | Open-drain fault indicator that goes low for undervoltage, overvoltage, or thermal shutdown faults (a nuisance fast trip does not trigger it), with a maximum sink current of 100 mA and absolute maximum of 20 V. |
| 7 | ILIM | passive | A resistor from this pin to GND sets the overload and short-circuit current limit, with 35.7 kΩ to 158 kΩ recommended (ILIM pin 0 to 3.3 V). |
| 8 | OVP | input | Input for setting the programmable overvoltage protection threshold; an overvoltage event opens the internal FET and asserts FLT, with a recommended range of 0 to 18 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Circuit Protection |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS25921LD - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps25921ld-etched.step/tps25921ld-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps25921ld.step/tps25921ld.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (37 pp, sha256
8d06a4861fe9cc79, retrieved 2026-10-07, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).