component
TPS25741ARSMT
Public Made by Adomby adom
Texas Instruments Power Management - Specialized, VQFN-32(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+70@@ -0,0 +1,70 @@+# TPS25741ARSMT++**Texas Instruments** · Power Management - Specialized · VQFN-32(4x4)++TPS25741ARSMT from Texas Instruments, in a VQFN-32(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VTX | power_out | Bypass pin for the transmit driver supply; use a 0.1 µF ceramic capacitor. |+| 2 | CC1 | bidirectional | Multifunction USB Type-C configuration channel pin for connector polarity, end-device connection detect, current capability and Power Delivery communication, with sustained pin voltage limited to -0.3 V to 6 V. |+| 3 | VCONN | power_in | Input for the VCONN supply, internally current limited and routed to the CC pin not connected to the cable once UFP is pulled low; bypass to GND with the recommended capacitor and keep sustained voltage within -0.3 V to 7 V. |+| 4 | CC2 | bidirectional | Multifunction USB Type-C configuration channel pin for connector polarity, end-device connection detect, current capability and Power Delivery communication, with sustained pin voltage limited to -0.3 V to 6 V. |+| 5 | GND | power_in | Power ground for power management and gate driver circuits; connect to AGND and the thermal pad. |+| 6 | HIPWR | input | Four-state input that sets the voltages and currents advertised, connected directly to GND or DVDD or through resistance RSEL, with pin voltage limited to -0.3 V to 2.1 V. |+| 7 | CTL1 | output | Digital output used to control an external voltage regulator, with average sink current limited to 8 mA. |+| 8 | CTL2 | output | Digital output used to control an external voltage regulator, with average sink current limited to 8 mA. |+| 9 | POL | output | Goes low when a UFP is connected on CC2 and is high-impedance otherwise; average sink current limited to 8 mA. |+| 10 | EN9V/EN12V | input | On TPS25741 this enables the 12 V PDO when pulled high (not advertised when low); on TPS25741A it enables the 9 V PDO in the same way. |+| 11 | N/C | passive | Datasheet states this pin is to be connected to GND. |+| 12 | N/C | passive | Datasheet states this pin is to be connected to GND. |+| 13 | N/C | passive | Datasheet states this pin is to be connected to GND. |+| 14 | UFP | output | Goes low to indicate that either CC1 or CC2 (but not both) is pulled down by a USB Type-C Sink; average sink current limited to 8 mA. |+| 15 | DEBUG | output | Goes low when a debug accessory is present and is high-impedance otherwise; average sink current limited to 8 mA. |+| 16 | PSEL | input | Four-state input that selects the maximum power that can be provided, connected directly to GND or DVDD or through resistance RSEL, with pin voltage limited to -0.3 V to 2.1 V. |+| 17 | VIO | input | Connect VIO to the DVDD pin; sustained pin voltage limited to -0.3 V to 6 V. |+| 18 | DVDD | power_out | Internally regulated 1.85 V rail for external use up to 35 mA; connect to GND via the recommended bypass capacitor. |+| 19 | PCTRL | input | Input that controls the power advertised and may be pulled high or low dynamically; sustained pin voltage limited to -0.3 V to 6 V. |+| 20 | GD | input | Master enable for the GDNG/GDNS gate drivers; driving it low forces the power path switch off, with sustained pin voltage limited to -0.3 V to 7 V. |+| 21 | VAUX | power_out | Internally regulated rail for the power management circuits; connect to GND via the recommended bypass capacitor. |+| 22 | VDD | power_in | Optional input supply; sustained pin voltage limited to -0.3 V to 6 V. |+| 23 | AGND | power_in | Analog ground for monitoring and power-conditioning circuits; connect to GND and the thermal pad. |+| 24 | ISNS | input | Monitors a VBUS-referenced sense resistor for over-current events; ISNS-to-VBUS voltage limited to ±0.3 V and sustained pin voltage to -0.5 V to 30 V. |+| 25 | VPWR | power_in | Bias power input from an external voltage source; optional while UFP is high if VDD is supplied, with sustained pin voltage limited to -0.5 V to 30 V. |+| 26 | VBUS | power_in | Voltage monitor for the USB connector VBUS line, which is the high-side power conductor; sustained pin voltage limited to -0.5 V to 30 V. |+| 27 | GDPG | output | High-voltage open-drain gate driver that may drive PMOS power switches; pin voltage limited to -0.3 V to 30 V and average sink current to 3.5 mA. |+| 28 | AUDIO | output | Goes low when an audio accessory is present and is high-impedance otherwise; average sink current limited to 3.5 mA. |+| 29 | GDNG | output | High-voltage open-drain gate driver for NMOS power switches, connected to the gate terminal; V(GDNG)-V(GDNS) limited to -0.3 V to 20 V. |+| 30 | GDNS | output | High-voltage open-drain gate driver for NMOS power switches, connected to the source terminal; sustained pin voltage limited to -0.5 V to 30 V. |+| 31 | DSCG | output | Open-drain output that discharges the system VBUS line through an external resistor; average sink current limited to 10 mA and sustained pin voltage to -0.5 V to 30 V. |+| 32 | G5V | output | Analog gate drive output for an external NMOS power switch; sustained pin voltage limited to -0.3 V to 20 V. |+| 33 | PAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-32(4x4) |+| Category | Power Management (PMIC) |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `TPS25741ARSMT`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_4x4mm_P0.4mm_EP2.9x2.9mm`+- 3D model: VQFN-32(4x4) (KiCad packages3D, STEP)+- 3D model files: `tps25741arsmt-etched.step` / `tps25741arsmt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps25741arsmt.step` / `tps25741arsmt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps25741a) (69 pp, sha256 `c9e2a2d29126c712`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps25741arsmt-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power management (pmic)",+ "tps25741arsmt",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps25741arsmt.kicad_sym",+ "tps25741arsmt.kicad_mod",+ "tps25741arsmt.glb",+ "tps25741arsmt.step",+ "tps25741arsmt.lbr",+ "docs/hero.png",+ "docs/tps25741arsmt-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps25741arsmt-hero.glb",+ "tps25741arsmt-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS25741ARSMT",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-32(4x4)",+ "pin_count": 33,+ "category": "Power Management (PMIC)",+ "subcategory": "Power Management - Specialized",+ "datasheet": "https://www.ti.com/cn/lit/gpn/tps25741a",+ "parts": {+ "symbol": "tps25741arsmt.kicad_sym",+ "footprint": "tps25741arsmt.kicad_mod",+ "model_3d": "tps25741arsmt-hero.glb",+ "model_3d_plain": "tps25741arsmt.glb",+ "model_3d_step": "tps25741arsmt-etched.step",+ "model_3d_step_plain": "tps25741arsmt.step",+ "lbr": "tps25741arsmt.lbr"+ },+ "distributor_links": {+ "lcsc": "C3189297",+ "digikey": "296-TPS25741ARSMTTR-ND",+ "mouser": "595-TPS25741ARSMT"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:03:27Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-TPS25741ARSMTTR-ND",+ "status": "found",+ "lifecycle": "Not For New Designs"+ },+ "mouser": {+ "pn": "595-TPS25741ARSMT",+ "status": "found",+ "lifecycle": "Not Recommended for New Designs"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VTX",+ "type": "power_out",+ "description": "Bypass pin for the transmit driver supply; use a 0.1 µF ceramic capacitor."+ },+ {+ "number": "2",+ "name": "CC1",+ "type": "bidirectional",+ "description": "Multifunction USB Type-C configuration channel pin for connector polarity, end-device connection detect, current capability and Power Delivery communication, with sustained pin voltage limited to -0.3 V to 6 V."+ },+ {+ "number": "3",+ "name": "VCONN",+ "type": "power_in",+ "description": "Input for the VCONN supply, internally current limited and routed to the CC pin not connected to the cable once UFP is pulled low; bypass to GND with the recommended capacitor and keep sustained voltage within -0.3 V to 7 V."+ },+ {+ "number": "4",+ "name": "CC2",+ "type": "bidirectional",+ "description": "Multifunction USB Type-C configuration channel pin for connector polarity, end-device connection detect, current capability and Power Delivery communication, with sustained pin voltage limited to -0.3 V to 6 V."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Power ground for power management and gate driver circuits; connect to AGND and the thermal pad."+ },+ {+ "number": "6",+ "name": "HIPWR",+ "type": "input",+ "description": "Four-state input that sets the voltages and currents advertised, connected directly to GND or DVDD or through resistance RSEL, with pin voltage limited to -0.3 V to 2.1 V."+ },+ {+ "number": "7",+ "name": "CTL1",+ "type": "output",+ "description": "Digital output used to control an external voltage regulator, with average sink current limited to 8 mA."+ },+ {+ "number": "8",+ "name": "CTL2",+ "type": "output",+ "description": "Digital output used to control an external voltage regulator, with average sink current limited to 8 mA."+ },+ {+ "number": "9",+ "name": "POL",+ "type": "output",+ "description": "Goes low when a UFP is connected on CC2 and is high-impedance otherwise; average sink current limited to 8 mA."+ },+ {+ "number": "10",+ "name": "EN9V/EN12V",+ "type": "input",+ "description": "On TPS25741 this enables the 12 V PDO when pulled high (not advertised when low); on TPS25741A it enables the 9 V PDO in the same way."+ },+ {+ "number": "11",+ "name": "N/C",+ "type": "passive",+ "description": "Datasheet states this pin is to be connected to GND."+ },+ {+ "number": "12",+ "name": "N/C",+ "type": "passive",+ "description": "Datasheet states this pin is to be connected to GND."+ },+ {+ "number": "13",+ "name": "N/C",+ "type": "passive",+ "description": "Datasheet states this pin is to be connected to GND."+ },+ {+ "number": "14",+ "name": "UFP",+ "type": "output",+ "description": "Goes low to indicate that either CC1 or CC2 (but not both) is pulled down by a USB Type-C Sink; average sink current limited to 8 mA."+ },+ {+ "number": "15",+ "name": "DEBUG",+ "type": "output",+ "description": "Goes low when a debug accessory is present and is high-impedance otherwise; average sink current limited to 8 mA."+ },+ {+ "number": "16",+ "name": "PSEL",+ "type": "input",+ "description": "Four-state input that selects the maximum power that can be provided, connected directly to GND or DVDD or through resistance RSEL, with pin voltage limited to -0.3 V to 2.1 V."+ },+ {+ "number": "17",+ "name": "VIO",+ "type": "input",+ "description": "Connect VIO to the DVDD pin; sustained pin voltage limited to -0.3 V to 6 V."+ },+ {+ "number": "18",+ "name": "DVDD",+ "type": "power_out",+ "description": "Internally regulated 1.85 V rail for external use up to 35 mA; connect to GND via the recommended bypass capacitor."+ },+ {+ "number": "19",+ "name": "PCTRL",+ "type": "input",+ "description": "Input that controls the power advertised and may be pulled high or low dynamically; sustained pin voltage limited to -0.3 V to 6 V."+ },+ {+ "number": "20",+ "name": "GD",+ "type": "input",+ "description": "Master enable for the GDNG/GDNS gate drivers; driving it low forces the power path switch off, with sustained pin voltage limited to -0.3 V to 7 V."+ },+ {+ "number": "21",+ "name": "VAUX",+ "type": "power_out",+ "description": "Internally regulated rail for the power management circuits; connect to GND via the recommended bypass capacitor."+ },+ {+ "number": "22",+ "name": "VDD",+ "type": "power_in",+ "description": "Optional input supply; sustained pin voltage limited to -0.3 V to 6 V."+ },+ {+ "number": "23",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground for monitoring and power-conditioning circuits; connect to GND and the thermal pad."+ },+ {+ "number": "24",+ "name": "ISNS",+ "type": "input",+ "description": "Monitors a VBUS-referenced sense resistor for over-current events; ISNS-to-VBUS voltage limited to ±0.3 V and sustained pin voltage to -0.5 V to 30 V."+ },+ {+ "number": "25",+ "name": "VPWR",+ "type": "power_in",+ "description": "Bias power input from an external voltage source; optional while UFP is high if VDD is supplied, with sustained pin voltage limited to -0.5 V to 30 V."+ },+ {+ "number": "26",+ "name": "VBUS",+ "type": "power_in",+ "description": "Voltage monitor for the USB connector VBUS line, which is the high-side power conductor; sustained pin voltage limited to -0.5 V to 30 V."+ },+ {+ "number": "27",+ "name": "GDPG",+ "type": "output",+ "description": "High-voltage open-drain gate driver that may drive PMOS power switches; pin voltage limited to -0.3 V to 30 V and average sink current to 3.5 mA."+ },+ {+ "number": "28",+ "name": "AUDIO",+ "type": "output",+ "description": "Goes low when an audio accessory is present and is high-impedance otherwise; average sink current limited to 3.5 mA."+ },+ {+ "number": "29",+ "name": "GDNG",+ "type": "output",+ "description": "High-voltage open-drain gate driver for NMOS power switches, connected to the gate terminal; V(GDNG)-V(GDNS) limited to -0.3 V to 20 V."+ },+ {+ "number": "30",+ "name": "GDNS",+ "type": "output",+ "description": "High-voltage open-drain gate driver for NMOS power switches, connected to the source terminal; sustained pin voltage limited to -0.5 V to 30 V."+ },+ {+ "number": "31",+ "name": "DSCG",+ "type": "output",+ "description": "Open-drain output that discharges the system VBUS line through an external resistor; average sink current limited to 10 mA and sustained pin voltage to -0.5 V to 30 V."+ },+ {+ "number": "32",+ "name": "G5V",+ "type": "output",+ "description": "Analog gate drive output for an external NMOS power switch; sustained pin voltage limited to -0.3 V to 20 V."+ },+ {+ "number": "33",+ "name": "PAD",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The thermal pad is printed as 'PAD' with no pin number, so it is not included in the pins array. It ; Pins 11, 12 and 13 are labeled N/C but the datasheet says to connect them to GND. They are listed as; Pin types are mapped to KiCad classes from the datasheet's I/O/I-O codes. Internally regulated rails",+ "exposed pad 33 added from the footprint"+ ],+ "pages_sent": 10,+ "cost_usd": 0.0936,+ "at": "2026-10-08T18:02:54"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/tps25741a",+ "pages": 69,+ "sha256": "c9e2a2d29126c712",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps25741arsmt.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.6+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "7b482a511cdf2cf875c31931f9fea7f745b8dac2ea6203531cd6604f40a290cb",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps25741arsmt-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.6+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "2b6059310e84b2f2c10ff9912df3620d024286ecf7c81a32b1793015d2ff9887",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}