component
TPS2552DDBVT
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, SOT-23-6. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownTPS2552DDBVT
Texas Instruments · Power Distribution Switches · SOT-23-6
TPS2552DDBVT from Texas Instruments, in a SOT-23-6. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Input voltage pin; connect a 0.1 μF or greater ceramic capacitor from IN to GND as close to the IC as possible. |
| 2 | GND | power_in | Ground connection; connect externally to the PowerPAD. |
| 3 | EN | input | Enable input for the TPS2552D; logic low turns on the power switch (active low). |
| 4 | FAULT | output | Active-low open-drain output, asserted during overcurrent, overtemperature, or reverse-voltage conditions. |
| 5 | ILIM | output | External resistor used to set the current-limit threshold; recommended 15 kΩ ≤ RILIM ≤ 232 kΩ. |
| 6 | OUT | power_out | Power-switch output. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-6 |
| Category | Power Management (PMIC) |
| Pins | 6 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage, IN | VIN | 2.7 | 6.5 | V | 5 | ||
| Enable voltage TPS2552D | VEN | 0 | 6.5 | V | TPS2552D | 5 | |
| High-level input voltage on EN | VIH | 1.1 | V | 5 | |||
| Low-level input voltage on EN | VIL | 0.66 | V | 5 | |||
| Continuous output current, OUT | IOUT | 0 | 1.2 | A | -40 °C ≤ TJ ≤ 125 °C | 5 | |
| Continuous output current, OUT | IOUT | 0 | 1.5 | A | -40 °C ≤ TJ ≤ 105 °C | 5 | |
| Current-limit threshold resistor range from ILIM to GND | RILIM | 15 | 232 | kΩ | nominal 1% | 5 | |
| Continuous FAULT sink current | IO | 0 | 10 | mA | 5 | ||
| Input de-coupling capacitance, IN to GND | 0.1 | μF | 5 | ||||
| Operating virtual junction temperature | TJ | -40 | 125 | °C | IOUT ≤ 1.2 A | 5 | |
| Operating virtual junction temperature | TJ | -40 | 105 | °C | IOUT ≤ 1.5 A | 5 | |
| Voltage range on IN, OUT, EN, ILIM, FAULT | -0.3 | 7 | V | 5 | |||
| Voltage range from IN to OUT | -7 | 7 | V | 5 | |||
| Continuous FAULT sink current | 0 | 25 | mA | 5 | |||
| ILIM source current | 0 | 1 | mA | 5 | |||
| Maximum junction temperature | TJ | -40 | 150 | °C | 5 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 5 | ||
| Static drain-source on-state resistance, DBV package | rDS(on) | 85 | 95 | mΩ | DBV package, TJ = 25°C | 7 | |
| Static drain-source on-state resistance, DBV package | rDS(on) | 135 | mΩ | DBV package, -40°C ≤ TJ ≤ 125°C | 7 | ||
| Rise time, output | tr | 1.1 | 1.5 | ms | VIN = 6.5 V, CL = 1 μF, RL = 100 Ω | 7 | |
| Rise time, output | tr | 0.7 | 1 | ms | VIN = 2.5 V, CL = 1 μF, RL = 100 Ω | 7 | |
| Fall time, output | tf | 0.2 | 0.5 | ms | VIN = 6.5 V, CL = 1 μF, RL = 100 Ω | 7 | |
| Enable pin turn on/off threshold | 0.66 | 1.1 | V | 7 | |||
| Input current, EN | IEN | -0.5 | 0.5 | μA | VEN = 0 V or 6.5 V | 7 | |
| Turnon time | ton | 3 | ms | CL = 1 μF, RL = 100 Ω | 7 | ||
| Turnoff time | toff | 3 | ms | CL = 1 μF, RL = 100 Ω | 7 | ||
| Current-limit threshold and short-circuit current | IOS | 1610 | 1700 | 1800 | mA | RILIM = 15 kΩ, -40°C ≤ TJ ≤ 105°C | 7 |
| Current-limit threshold and short-circuit current | IOS | 1215 | 1295 | 1375 | mA | RILIM = 20 kΩ, TJ = 25°C | 7 |
| Current-limit threshold and short-circuit current | IOS | 1200 | 1295 | 1375 | mA | RILIM = 20 kΩ, -40°C ≤ TJ ≤ 125°C | 7 |
| Current-limit threshold and short-circuit current | IOS | 490 | 520 | 550 | mA | RILIM = 49.9 kΩ, TJ = 25°C | 7 |
| Current-limit threshold and short-circuit current | IOS | 475 | 520 | 565 | mA | RILIM = 49.9 kΩ, -40°C ≤ TJ ≤ 125°C | 7 |
| Current-limit threshold and short-circuit current | IOS | 110 | 130 | 150 | mA | RILIM = 210 kΩ | 7 |
| Current-limit threshold and short-circuit current | IOS | 50 | 75 | 100 | mA | ILIM shorted to IN | 7 |
| Reverse-voltage comparator trip point (VOUT, VIN) | 95 | 135 | 190 | mV | 7 | ||
| Time from reverse-voltage condition to MOSFET turn off | 3 | 5 | 7 | ms | VIN = 5 V | 7 | |
| Supply current, low-level output | IIN_off | 0.1 | 1 | μA | VIN = 6.5 V, No load on OUT, VEN = 0 V | 7 | |
| Supply current, high-level output | IIN_on | 120 | 150 | μA | VIN = 6.5 V, No load on OUT, RILIM = 20 kΩ | 7 | |
| Supply current, high-level output | IIN_on | 100 | 130 | μA | VIN = 6.5 V, No load on OUT, RILIM = 210 kΩ | 7 | |
| Reverse leakage current | IREV | 0.01 | 1 | μA | VOUT = 6.5 V, VIN = 0 V, TJ = 25 °C | 7 | |
| Low-level input voltage, IN (UVLO rising) | UVLO | 2.35 | 2.45 | V | VIN rising | 7 | |
| Hysteresis, IN | 25 | mV | TJ = 25 °C | 7 | |||
| Output low voltage, FAULT | VOL | 180 | mV | I/FAULT = 1 mA | 7 | ||
| Off-state leakage, FAULT | 1 | μA | V/FAULT = 6.5 V | 7 | |||
| FAULT deglitch, overcurrent | 5 | 7.5 | 10 | ms | FAULT assertion or de-assertion due to overcurrent condition | 7 | |
| FAULT deglitch, reverse-voltage | 2 | 4 | 6 | ms | FAULT assertion or de-assertion due to reverse-voltage condition | 7 | |
| Thermal shutdown threshold | 155 | °C | 7 | ||||
| Thermal shutdown threshold in current-limit | 135 | °C | 7 | ||||
| Thermal shutdown hysteresis | 10 | °C | 7 | ||||
| Turnon/response time to short circuit | tIOS | 2 | μs | VIN = 5 V | 7 | ||
| Junction-to-ambient thermal resistance, DBV | RθJA | 182.6 | °C/W | DBV 6-pin | 6 | ||
| Junction-to-case (top) thermal resistance, DBV | RθJC(top) | 122.2 | °C/W | DBV 6-pin | 6 | ||
| Junction-to-board thermal resistance, DBV | RθJB | 29.4 | °C/W | DBV 6-pin | 6 | ||
| Junction-to-top characterization parameter, DBV | ψJT | 20.8 | °C/W | DBV 6-pin | 6 | ||
| Junction-to-board characterization parameter, DBV | ψJB | 28.9 | °C/W | DBV 6-pin | 6 |
CAD (KiCad official)
- Symbol:
TPS2552DDBVT - Footprint:
Package_TO_SOT_SMD:SOT-23-6 - 3D model: SOT-23-6 (KiCad packages3D, STEP)
- 3D model files:
tps2552ddbvt-etched.step/tps2552ddbvt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2552ddbvt.step/tps2552ddbvt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (35 pp, sha256
46d2dd4cbec8c2ab, retrieved 2026-11-05, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).