component
TPS25200DRVT
Public Made by Adomby adom
Texas Instruments Surge Protection Devices (SPDs), WSON-6(2x2). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS25200DRVT
Texas Instruments · Surge Protection Devices (SPDs) · WSON-6(2x2)
TPS25200DRVT from Texas Instruments, in a WSON-6(2x2). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | OUT | power_out | Protected power-switch output; continuous load current up to 2.6 A; output clamped to 5.25 V-5.55 V when VIN exceeds the OVC threshold; 480 Ω (typ) active discharge to GND when disabled or in UVLO/OVLO. |
| 2 | ILIM | output | Current-limit set pin; TPS25200 regulates a voltage on this pin so that the resistor RILIM connected from ILIM to GND programs the overcurrent threshold IOS; recommended range 33 kΩ ≤ RILIM ≤ 1100 kΩ (85 mA to 2.9 A typ); max continuous pull-up current 150 µA. |
| 3 | FAULT | output | Active-low open-drain fault flag; asserted during overcurrent (with 5 ms-12 ms deglitch), overvoltage lock-out, or overtemperature events; VOL ≤ 180 mV at IFAULT = 1 mA; off-state leakage ≤ 1 µA at VFAULT = 6.5 V; connect pull-up resistor to logic I/O supply rail. |
| 4 | EN | input | Active-high logic enable input; turn-on threshold 1.9 V (typ, rising), turn-off threshold 0.6 V (typ, falling), 330 mV hysteresis; TTL/CMOS compatible up to 6.5 V; leakage ±2 µA; pin must not be left floating. |
| 5 | GND | power_in | Ground reference for all signals; must be externally connected to the PowerPAD (pad 7) for correct operation. |
| 6 | IN | power_in | Supply voltage input; operating range 2.5 V to 6.5 V, withstands up to 20 V DC; UVLO threshold 2.35 V-2.45 V (rising); OVLO shutdown 6.8 V-8.45 V (rising, 7.6 V typ); place 0.1 µF or larger ceramic bypass capacitor from IN to GND as close to the device as possible. |
| 7 | PowerPAD | power_in | Exposed bottom thermal pad; internally connected to GND; must be soldered to the PCB ground plane for thermal and mechanical performance; θJCbot = 7.6 °C/W. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | WSON-6(2x2) |
| Category | Circuit Protection |
| Pins | 7 |
CAD (KiCad official)
- Symbol:
TPS25200DRVT - Footprint:
Package_SON:WSON-6-1EP_2x2mm_P0.65mm_EP1x1.6mm - 3D model: WSON-6(2x2) (KiCad packages3D, STEP)
- 3D model files:
tps25200drvt-etched.step/tps25200drvt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps25200drvt.step/tps25200drvt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (31 pp, sha256
85d7090e98fc7d4b, retrieved 2026-09-27, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).