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TPS2483PW
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Texas Instruments Supervisor And Reset ICs, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS2483PW
Texas Instruments · Supervisor And Reset ICs · TSSOP-20
TPS2483PW from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDA | bidirectional | Serial-bus data line, open-drain input/output with Schmitt-trigger input and spike suppression for the I2C/SMBus interface. |
| 2 | SCL | input | Serial-bus clock line, high-impedance input for the I2C/SMBus interface. |
| 3 | ALERT | output | Open-drain multi-function serial-bus alert output that can be programmed to go low when a user-defined threshold is exceeded. |
| 4 | VS | power_in | Monitor-section bias-supply input for POR1, control logic, ADC and serial-bus interface, typically 2.7 V to 5.5 V. |
| 5 | N/C | unconnected | No connection; tie to GND or float. |
| 6 | EN | input | Hotswap-section enable input with hysteresis between its upper and lower thresholds; it can be tied to VCC to always enable the device. |
| 7 | VREF | power_in | Reference voltage output used to set the PROG power-limit threshold, with a recommended reference source current of 0 to 1 mA. |
| 8 | PROG | input | Pass-MOSFET power-limit programming input, normally 0.4 V to 4.0 V, and voltages above 4 V must not be applied. |
| 9 | TIMER | input | Fault-timing capacitor connection to GND; TIMER reaching 4 V latches off the TPS2482 or starts a retry for the TPS2483, and the pin should be tied to ground if the feature is unused. |
| 10 | GND | power_in | Common system ground reference for all other input and output voltages. |
| 11 | PG | output | Open-drain power-good output that goes high after pass-MOSFET VDS falls below 1.25 V and a 9-ms deglitch time elapses, and is low when VDS exceeds 2.7 V or UVLO is active. |
| 12 | OUT | input | Input that senses pass-MOSFET source voltage for power-limit protection and PG determination; if the load can drive OUT below ground, a clamp diode to GND is needed to keep VOUT above -0.3 V. |
| 13 | GATE | output | High-side pass-MOSFET gate-drive output with a 22 µA pull-up from the charge pump and a pull-down to ground of at least 75 mA, clamped internally to OUT. |
| 14 | SENSE | input | Input that senses pass-MOSFET drain voltage and the downstream side of the current-shunt RS for constant-power and current limiting, and should not be driven to a large voltage difference from VCC. |
| 15 | VCC | power_in | Hotswap-section bias-supply input and positive reference for shunt sensing; it must exceed the POR2 threshold (about 6 V) and UVLO turn-on (about 8.4 V) before GATE can be driven, with a recommended range of 9 V to 80 V. |
| 16 | GND | power_in | Common system ground reference for all other input and output voltages. |
| 17 | VINM | input | Kelvin-connected negative (load) side of the current-sense resistor, which also serves as the bus-voltage measurement point to GND. |
| 18 | VINP | input | Kelvin-connected positive (source) side of the current-sense resistor for the differential shunt voltage input. |
| 19 | A1 | input | Serial-bus address input that may be tied to GND, VS, SDA, or SCL, which together with A0 selects one of 16 slave addresses per Table 8. |
| 20 | A0 | input | Serial-bus address input that may be tied to GND, VS, SDA, or SCL, which together with A1 selects one of 16 slave addresses per Table 8. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Power Management (PMIC) |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
TPS2483PW - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
tps2483pw-etched.step/tps2483pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2483pw.step/tps2483pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (58 pp, sha256
4af3cee11d85aa57, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS2483PW
**Texas Instruments** · Supervisor And Reset ICs · TSSOP-20
TPS2483PW from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SDA | bidirectional | Serial-bus data line, open-drain input/output with Schmitt-trigger input and spike suppression for the I2C/SMBus interface. |
| 2 | SCL | input | Serial-bus clock line, high-impedance input for the I2C/SMBus interface. |
| 3 | ALERT | output | Open-drain multi-function serial-bus alert output that can be programmed to go low when a user-defined threshold is exceeded. |
| 4 | VS | power_in | Monitor-section bias-supply input for POR1, control logic, ADC and serial-bus interface, typically 2.7 V to 5.5 V. |
| 5 | N/C | unconnected | No connection; tie to GND or float. |
| 6 | EN | input | Hotswap-section enable input with hysteresis between its upper and lower thresholds; it can be tied to VCC to always enable the device. |
| 7 | VREF | power_in | Reference voltage output used to set the PROG power-limit threshold, with a recommended reference source current of 0 to 1 mA. |
| 8 | PROG | input | Pass-MOSFET power-limit programming input, normally 0.4 V to 4.0 V, and voltages above 4 V must not be applied. |
| 9 | TIMER | input | Fault-timing capacitor connection to GND; TIMER reaching 4 V latches off the TPS2482 or starts a retry for the TPS2483, and the pin should be tied to ground if the feature is unused. |
| 10 | GND | power_in | Common system ground reference for all other input and output voltages. |
| 11 | PG | output | Open-drain power-good output that goes high after pass-MOSFET VDS falls below 1.25 V and a 9-ms deglitch time elapses, and is low when VDS exceeds 2.7 V or UVLO is active. |
| 12 | OUT | input | Input that senses pass-MOSFET source voltage for power-limit protection and PG determination; if the load can drive OUT below ground, a clamp diode to GND is needed to keep VOUT above -0.3 V. |
| 13 | GATE | output | High-side pass-MOSFET gate-drive output with a 22 µA pull-up from the charge pump and a pull-down to ground of at least 75 mA, clamped internally to OUT. |
| 14 | SENSE | input | Input that senses pass-MOSFET drain voltage and the downstream side of the current-shunt RS for constant-power and current limiting, and should not be driven to a large voltage difference from VCC. |
| 15 | VCC | power_in | Hotswap-section bias-supply input and positive reference for shunt sensing; it must exceed the POR2 threshold (about 6 V) and UVLO turn-on (about 8.4 V) before GATE can be driven, with a recommended range of 9 V to 80 V. |
| 16 | GND | power_in | Common system ground reference for all other input and output voltages. |
| 17 | VINM | input | Kelvin-connected negative (load) side of the current-sense resistor, which also serves as the bus-voltage measurement point to GND. |
| 18 | VINP | input | Kelvin-connected positive (source) side of the current-sense resistor for the differential shunt voltage input. |
| 19 | A1 | input | Serial-bus address input that may be tied to GND, VS, SDA, or SCL, which together with A0 selects one of 16 slave addresses per Table 8. |
| 20 | A0 | input | Serial-bus address input that may be tied to GND, VS, SDA, or SCL, which together with A1 selects one of 16 slave addresses per Table 8. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Power Management (PMIC) |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `TPS2483PW`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `tps2483pw-etched.step` / `tps2483pw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2483pw.step` / `tps2483pw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps2483.pdf) (58 pp, sha256 `4af3cee11d85aa57`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps2483pw-datasheet.pdf)