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TPS24742RGER

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS24742RGER

Texas Instruments · Supervisor And Reset ICs · VQFN-24-EP(4x4)

TPS24742RGER from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CP bidirectional Connect a storage capacitor from CP to A for fast turn-on of the blocking gate, with a recommended CP capacitance of 1 nF to 1000 nF.
2 ENHS input Active-high enable input for the hot-swap controller, a logic input intended to connect to a resistor divider.
3 ENOR input Active-high enable input for the ORing controller, a logic input intended to connect to a resistor divider.
4 FLTb output Active-low open-drain output indicating various faults, with sink current limited to 0 to 2 mA and input/output voltage up to 18 V.
5 PGHS output Active-high open-drain power-good indicator for the hot-swap output, with sink current limited to 0 to 2 mA.
6 STAT output Status output that is high when BGATE is ON, with sink current limited to 0 to 2 mA.
7 TINR bidirectional Inrush timer pin that runs during start-up when the part is in current limit or power limit, with an external capacitor of 1 nF.
8 TFLT bidirectional Fault timer pin that runs when the device goes from regular operation to an over-current condition, with an external capacitor of 1 nF.
9 OV input Overvoltage comparator input that connects to a resistor divider; HGATE and BGATE are pulled low when OV exceeds the threshold, and it should be connected to ground when not used.
10 GND power_in Ground reference for the device.
11 PLIM input Power-limit programming pin where a resistor from this pin to GND sets the maximum power dissipation for the hot-swap FET, with resistance of 4.99 kΩ to 500 kΩ.
12 IMON bidirectional Analog current monitor and load current limit program point, with RIMON connected to ground and a recommended resistance of 1 kΩ to 6 kΩ.
13 IMONBUF output Voltage output proportional to the load current, ranging from 0 V to 3.0 V, with a recommended maximum external capacitance of 100 pF.
14 VDD power_in Power supply input, with a recommended operating range of 2.5 V to 18 V and an absolute maximum of 30 V.
15 SET input Current-limit programming set pin for the hot-swap, where a resistor connects from the positive terminal of the sensing resistor to SET, with a recommended resistance of 10 Ω to 400 Ω; do not apply voltage to this pin.
16 FSTP input Fast-trip programming set pin for the hot-swap, where a resistor connects from the positive terminal of the sensing resistor to FSTP, with a recommended resistance of 10 Ω to 4000 Ω.
17 SENM input Current-sensing input that connects directly to the negative terminal of the sensing resistor, with a recommended operating voltage of 2.5 V to 18 V.
18 HGATE output Gate driver output for the external hot-swap MOSFET, with a maximum HGATE-to-OUTH voltage of 15 V and an external capacitance of up to 1 µF in series with at least 1 kΩ.
19 OUTH input Output voltage sensor for monitoring hot-swap MOSFET power, connecting to the source terminal of the hot-swap N-channel MOSFET, with a recommended input voltage of 0 V to 18 V.
20 C power_in Voltage sense input that connects to the OR MOSFET drain and supplies power to the ORing block under certain biasing conditions, with an absolute maximum of 30 V.
21 RVSNP input Positive input of the reverse voltage comparator, where a resistor from RVSNP to C sets the reverse voltage trip point, with a recommended resistance of 10 Ω to 1000 Ω and capacitance of 1 nF to 1000 nF.
22 BGATE output Gate drive output that controls the external OR MOSFET to emulate a low forward-voltage diode, with an absolute maximum of 40 V (12 V relative to A).
23 A power_in Voltage sense input that connects to the OR MOSFET source and supplies power to the ORing block under certain biasing conditions, with an absolute maximum of 30 V.
24 RVSNM input Negative input of the reverse voltage comparator, with a recommended operating voltage of 0.7 V to 18 V.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24-EP(4x4)
Category Power Management (PMIC)
Pins 25

CAD (KiCad official)

  • Symbol: TPS24742RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps24742rger-etched.step / tps24742rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps24742rger.step / tps24742rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (62 pp, sha256 ec6cf2628a5bace6, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF