component
TPS2400DBVT
Public Made by Adomby adom
Texas Instruments Monitors & Reset Circuits, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS2400DBVT
Texas Instruments · Monitors & Reset Circuits · SOT-23-5
TPS2400DBVT from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No internal connection. |
| 2 | GND | power_in | Ground. |
| 3 | NC | unconnected | No internal connection. |
| 4 | GATE | output | Output gate drive for an external N-channel MOSFET, driven by an internal charge pump (5 µA source, limited to 18 V by an internal Zener; absolute maximum 22 V continuous). |
| 5 | VIN | power_in | Input voltage; recommended operating range 3.1 V to 6.8 V, absolute maximum 110 V, with GATE driven low above the 6.9 V overvoltage threshold or below the 3 V undervoltage threshold. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOT-23-5 |
| Category | Power Supply Chip |
| Pins | 5 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input supply current | II(VIN) | 65 | 110 | µA | VI(VIN) = 3.1 V | 5 | |
| Input supply current | II(VIN) | 95 | 180 | µA | VI(VIN) = 5 V | 5 | |
| Input supply current | II(VIN) | 135 | 220 | µA | VI(VIN) = 6.5 V | 5 | |
| Input supply current | II(VIN) | 550 | 1000 | µA | VI(VIN) = 100 V | 5 | |
| Undervoltage lockout upper threshold | UVLO(upper) | 2.9 | 3 | 3.1 | V | VI(VIN) rising | 5 |
| Undervoltage lockout hysteresis | UVLO(hyst) | 85 | 100 | 115 | mV | 5 | |
| Overvoltage protection upper threshold | OVP(upper) | 6.7 | 6.9 | 7.1 | V | VI(VIN) rising | 5 |
| Overvoltage protection hysteresis | OVP(hyst) | 135 | 150 | 165 | mV | 5 | |
| Gate sourcing current | IOSOURCE(gate) | 3 | 10 | µA | VI(VIN) = 3.1 V, VO(gate) = 7 V | 5 | |
| Gate sinking current | IOSINK(gate) | 350 | 485 | 600 | mA | VI(VIN) = 7.2 V, VO(gate) = 15 V | 5 |
| Gate output high voltage | VOH(gate) | 10 | 12 | V | VI(VIN) = 3.1 V, IOSOURCE(gate) = 1 µA | 5 | |
| Gate output high voltage | VOH(gate) | 16 | 19 | V | VI(VIN) = 5 V, IOSOURCE(gate) = 1.5 µA | 5 | |
| Gate output high voltage | VOH(gate) | 16 | 20 | V | VI(VIN) = 6.5 V, IOSOURCE(gate) = 1.5 µA | 5 | |
| Gate output low voltage | VOL(gate) | 1 | V | VI(VIN) = 7.2 V, IOSINK(gate) = 50 mA | 5 | ||
| Gate turnon propagation delay | TON(prop) | 0.1 | 0.6 | ms | VI(VIN) stepped from 0 V to 5 V, CLOAD = 1 nF | 5 | |
| Gate turnon propagation delay | TON(prop) | 0.9 | 3 | ms | VI(VIN) stepped from 0 V to 5 V, CLOAD = 10 nF | 5 | |
| Gate turnon rise time | TON(rise) | 1.5 | 6 | ms | VI(VIN) stepped from 0 V to 5 V, CLOAD = 1 nF | 5 | |
| Gate turnon rise time | TON(rise) | 15 | 55 | ms | VI(VIN) stepped from 0 V to 5 V, CLOAD = 10 nF | 5 | |
| Supply voltage at VIN | VI(VIN) | 3.1 | 6.8 | V | 4 | ||
| Operating junction temperature (recommended) | TJ | -40 | 125 | °C | 4 | ||
| Input voltage VIN | VVIN | -0.3 | 110 | V | 4 | ||
| Output voltage GATE (continuous) | VOUT | -0.3 | 22 | V | 4 | ||
| Output voltage GATE (transient) | VOUT | -0.3 | 25 | V | transient, < 10 µs, Duty Cycle < 0.1% | 4 | |
| Operating junction temperature | TJ | -40 | 125 | °C | 4 | ||
| Operating free-air temperature | TA | -40 | 85 | °C | 4 | ||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| ESD HBM | V(ESD) | -2500 | 2500 | V | Human body model, all pins | 4 | |
| ESD CDM | V(ESD) | -500 | 500 | V | Charged device model, all pins | 4 | |
| Gate output high maximum voltage | VOHMAX(gate) | 20 | V | IOSOURCE(gate) = 0 µA | 5 | ||
| Turnoff time | TOFF | 0.25 | µs | VI(VIN) stepped from 6 V to 8 V, CLOAD = 1 nF | 5 | ||
| Turnoff time | TOFF | 0.5 | µs | VI(VIN) stepped from 6 V to 8 V, CLOAD = 10 nF | 5 | ||
| Junction-to-ambient thermal resistance | RθJA | 219.6 | °C/W | DBV (SOT-23), 5 pins | 4 | ||
| Junction-to-case (top) thermal resistance | RθJC(top) | 126.2 | °C/W | DBV (SOT-23), 5 pins | 4 | ||
| Junction-to-board thermal resistance | RθJB | 51.2 | °C/W | DBV (SOT-23), 5 pins | 4 | ||
| Junction-to-top characterization parameter | ψJT | 15.9 | °C/W | DBV (SOT-23), 5 pins | 4 | ||
| Junction-to-board characterization parameter | ψJB | 50.1 | °C/W | DBV (SOT-23), 5 pins | 4 |
CAD (KiCad official)
- Symbol:
TPS2400DBVT - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
tps2400dbvt-etched.step/tps2400dbvt-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2400dbvt.step/tps2400dbvt.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (25 pp, sha256
338b635cdc1019ad, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).