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Initial commit: component/tps2399dgkr

Ray ·faea5e23d2 ·1mo ago
2 files changed +244
README.mdadded+44
@@ -0,0 +1,44 @@+# TPS2399DGKR++**Texas Instruments** · Supervisor And Reset ICs · VSSOP-8-0.65mm++TPS2399DGKR from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PG | output | Open-drain, active-low power good output that is asserted only when the output is enabled, GATE has ramped to at least 7 V, and IRAMP exceeds about 5 V. |+| 2 | EN | input | Enable input referenced to -VIN; pulling it above the nominal 1.4-V threshold enables GATE and starts the load current ramp, while a low level disables the pass FET. |+| 3 | FLTTIME | bidirectional | Fault timeout programming pin; an external capacitor from FLTTIME to -VIN sets the fault timeout period, which is charged to the 4-V fault threshold during a fault. |+| 4 | IRAMP | bidirectional | Inrush slew rate programming pin; an external capacitor from IRAMP to -VIN sets the load current slew rate and is discharged when the output is disabled or a fault latches. |+| 5 | -VIN | power_in | Negative supply input and reference pin; the EN, ISENS, IRAMP and FLTTIME pins and all internal circuitry are referenced to it. |+| 6 | ISENS | input | Current sense input connected through a low-value sense resistor to -VIN; load current is regulated to a 40-mV reference, and a sense voltage above the 100-mV overload threshold pulls GATE low rapidly. |+| 7 | GATE | output | Gate drive output for the external N-channel pass FET, typically about 14 V when fully enhanced. |+| 8 | RTN | power_in | Positive supply input connected to the return node of the input power bus; the device is specified for input supply voltages of -36 V to -80 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-8-0.65mm |+| Category | Power Management (PMIC) |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TPS2399DGKR`+- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`+- 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)+- 3D model files: `tps2399dgkr-etched.step` / `tps2399dgkr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2399dgkr.step` / `tps2399dgkr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps2399.pdf) (30 pp, sha256 `2d3f49887517c851`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps2399dgkr-datasheet.pdf)
page.jsonadded+200
@@ -0,0 +1,200 @@+{+  "slug": "tps2399dgkr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Supervisor And Reset ICs, VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "power management (pmic)",+    "tps2399dgkr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "tps2399dgkr.kicad_sym",+    "tps2399dgkr.kicad_mod",+    "tps2399dgkr.glb",+    "tps2399dgkr.step",+    "tps2399dgkr.lbr",+    "docs/hero.png",+    "docs/tps2399dgkr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "tps2399dgkr-hero.glb",+    "tps2399dgkr-hero.overlay.json"+  ],+  "component": {+    "mpn": "TPS2399DGKR",+    "manufacturer": "Texas Instruments",+    "package": "VSSOP-8-0.65mm",+    "pin_count": 8,+    "category": "Power Management (PMIC)",+    "subcategory": "Supervisor And Reset ICs",+    "datasheet": "https://www.ti.com/lit/ds/symlink/tps2399.pdf",+    "parts": {+      "symbol": "tps2399dgkr.kicad_sym",+      "footprint": "tps2399dgkr.kicad_mod",+      "model_3d": "tps2399dgkr-hero.glb",+      "model_3d_plain": "tps2399dgkr.glb",+      "model_3d_step": "tps2399dgkr-etched.step",+      "model_3d_step_plain": "tps2399dgkr.step",+      "lbr": "tps2399dgkr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2653593",+      "digikey": "296-50550-2-ND",+      "mouser": "595-TPS2399DGKR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T15:47:16Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-50550-2-ND",+        "status": "found",+        "lifecycle": "Active"+      },+      "mouser": {+        "pn": "595-TPS2399DGKR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "PG",+        "type": "output",+        "description": "Open-drain, active-low power good output that is asserted only when the output is enabled, GATE has ramped to at least 7 V, and IRAMP exceeds about 5 V."+      },+      {+        "number": "2",+        "name": "EN",+        "type": "input",+        "description": "Enable input referenced to -VIN; pulling it above the nominal 1.4-V threshold enables GATE and starts the load current ramp, while a low level disables the pass FET."+      },+      {+        "number": "3",+        "name": "FLTTIME",+        "type": "bidirectional",+        "description": "Fault timeout programming pin; an external capacitor from FLTTIME to -VIN sets the fault timeout period, which is charged to the 4-V fault threshold during a fault."+      },+      {+        "number": "4",+        "name": "IRAMP",+        "type": "bidirectional",+        "description": "Inrush slew rate programming pin; an external capacitor from IRAMP to -VIN sets the load current slew rate and is discharged when the output is disabled or a fault latches."+      },+      {+        "number": "5",+        "name": "-VIN",+        "type": "power_in",+        "description": "Negative supply input and reference pin; the EN, ISENS, IRAMP and FLTTIME pins and all internal circuitry are referenced to it."+      },+      {+        "number": "6",+        "name": "ISENS",+        "type": "input",+        "description": "Current sense input connected through a low-value sense resistor to -VIN; load current is regulated to a 40-mV reference, and a sense voltage above the 100-mV overload threshold pulls GATE low rapidly."+      },+      {+        "number": "7",+        "name": "GATE",+        "type": "output",+        "description": "Gate drive output for the external N-channel pass FET, typically about 14 V when fully enhanced."+      },+      {+        "number": "8",+        "name": "RTN",+        "type": "power_in",+        "description": "Positive supply input connected to the return node of the input power bus; the device is specified for input supply voltages of -36 V to -80 V."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The datasheet lists RTN as an 'I' (input) pin. I classed it as power_in because it is the positive s; Pin descriptions are taken from the terminal functions table (page 4) and expanded with detailed pin; The datasheet's package listing is for DGK (8-pin MSOP/VSSOP). The package hint 'VSSOP-8-0.65mm' is "+        ],+        "pages_sent": 12,+        "cost_usd": 0.0693,+        "at": "2026-10-08T15:46:55"+      },+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/tps2399.pdf",+        "pages": 30,+        "sha256": "2d3f49887517c851",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "tps2399dgkr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          3.1,+          2,+          0.85+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "353552981eef35cb93635057d4aeb89aef22648c77af6fd095e328bfe6b834bd",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "tps2399dgkr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          3.1,+          2,+          0.85+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "e4aa60b31baf5de2c556e032245bcd0d9f110af892c5afe8f7f8a6646e5121b6",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file