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TPS2393APWR
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Texas Instruments Supervisor And Reset ICs, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS2393APWR
Texas Instruments · Supervisor And Reset ICs · TSSOP-14
TPS2393APWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UVLO | input | Voltage sense input for undervoltage lockout; the pin must be above the 1.4-V typical threshold for gate drive, and a minimum 1500-pF capacitor is required between UVLO and −VIN. |
| 2 | INSA | input | Insertion detection input A; INSA and INSB must both be pulled below approximately 1.4 V to enable the GATE output, with an on-chip pull-up and a nominal 6.2-ms debounce filter. |
| 3 | INSB | input | Insertion detection input B, working together with INSA; both inputs must be pulled below approximately 1.4 V to enable the GATE output, with a nominal 6.2-ms debounce filter. |
| 4 | FAULT | output | Open-drain, active-low load fault indication that is pulled low to −VIN when the fault latch is set; absolute maximum output voltage is 100 V and continuous output current is 10 mA. |
| 5 | EN | input | Enable input referenced to −VIN that turns the load power on when pulled above the nominal 1.4-V threshold with all other qualifications met, and disables the GATE drive when low. |
| 6 | FLTTIME | bidirectional | Connection for an external capacitor to −VIN that sets the fault timeout period; the capacitor is charged to the 4-V fault threshold and then discharged at about 1% of the charge rate to set the retry duty cycle. |
| 7 | IRAMP | bidirectional | Programming input for the inrush current slew rate; an external capacitor to −VIN sets the load current slew rate at turn-on and is discharged and held low when the output is disabled. |
| 8 | −VIN | power_in | Negative supply input and reference pin to which all internal circuitry and input/output pins are referenced, connecting directly to the negative rail of the input supply. |
| 9 | ISENS | input | Current sense input connected through an external low-value resistor to −VIN; the current is limited to a 40-mV reference during ramp-up and an overload above 100 mV pulls GATE low rapidly. |
| 10 | GATE | output | Gate drive for the external N-channel FET, driven to about 14 V when fully enhanced and pulled low by the device during UVLO, OVLO, EN-low, insertion, or fault conditions. |
| 11 | RTN | power_in | Positive supply input for the device, connected directly to the return node of the input power bus; the recommended input supply from −VIN to RTN is −20 V to −80 V. |
| 12 | PG | output | Open-drain, active-low power-good indication that is asserted when DRAINSNS is below its 1.35-V typical threshold and IRAMP is above 5 V; the absolute maximum output voltage is 100 V with 10 mA continuous output current. |
| 13 | DRAINSNS | input | Sense input for load voltage status, which must be pulled below about 1.35 V (typical) relative to −VIN to declare power good; it connects to the FET drain through a small-signal blocking diode and has an internal pull-up. |
| 14 | OVLO | input | Voltage sense input for overvoltage lockout; the pin must be below the 1.4-V typical threshold for gate drive, and rising above it pulls GATE low while an internal 10-µA pull-up sets the hysteresis. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
TPS2393APWR - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
tps2393apwr-etched.step/tps2393apwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2393apwr.step/tps2393apwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (32 pp, sha256
e90e0674b86a93ea, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS2393APWR
**Texas Instruments** · Supervisor And Reset ICs · TSSOP-14
TPS2393APWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | UVLO | input | Voltage sense input for undervoltage lockout; the pin must be above the 1.4-V typical threshold for gate drive, and a minimum 1500-pF capacitor is required between UVLO and −VIN. |
| 2 | INSA | input | Insertion detection input A; INSA and INSB must both be pulled below approximately 1.4 V to enable the GATE output, with an on-chip pull-up and a nominal 6.2-ms debounce filter. |
| 3 | INSB | input | Insertion detection input B, working together with INSA; both inputs must be pulled below approximately 1.4 V to enable the GATE output, with a nominal 6.2-ms debounce filter. |
| 4 | FAULT | output | Open-drain, active-low load fault indication that is pulled low to −VIN when the fault latch is set; absolute maximum output voltage is 100 V and continuous output current is 10 mA. |
| 5 | EN | input | Enable input referenced to −VIN that turns the load power on when pulled above the nominal 1.4-V threshold with all other qualifications met, and disables the GATE drive when low. |
| 6 | FLTTIME | bidirectional | Connection for an external capacitor to −VIN that sets the fault timeout period; the capacitor is charged to the 4-V fault threshold and then discharged at about 1% of the charge rate to set the retry duty cycle. |
| 7 | IRAMP | bidirectional | Programming input for the inrush current slew rate; an external capacitor to −VIN sets the load current slew rate at turn-on and is discharged and held low when the output is disabled. |
| 8 | −VIN | power_in | Negative supply input and reference pin to which all internal circuitry and input/output pins are referenced, connecting directly to the negative rail of the input supply. |
| 9 | ISENS | input | Current sense input connected through an external low-value resistor to −VIN; the current is limited to a 40-mV reference during ramp-up and an overload above 100 mV pulls GATE low rapidly. |
| 10 | GATE | output | Gate drive for the external N-channel FET, driven to about 14 V when fully enhanced and pulled low by the device during UVLO, OVLO, EN-low, insertion, or fault conditions. |
| 11 | RTN | power_in | Positive supply input for the device, connected directly to the return node of the input power bus; the recommended input supply from −VIN to RTN is −20 V to −80 V. |
| 12 | PG | output | Open-drain, active-low power-good indication that is asserted when DRAINSNS is below its 1.35-V typical threshold and IRAMP is above 5 V; the absolute maximum output voltage is 100 V with 10 mA continuous output current. |
| 13 | DRAINSNS | input | Sense input for load voltage status, which must be pulled below about 1.35 V (typical) relative to −VIN to declare power good; it connects to the FET drain through a small-signal blocking diode and has an internal pull-up. |
| 14 | OVLO | input | Voltage sense input for overvoltage lockout; the pin must be below the 1.4-V typical threshold for gate drive, and rising above it pulls GATE low while an internal 10-µA pull-up sets the hysteresis. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `TPS2393APWR`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `tps2393apwr-etched.step` / `tps2393apwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2393apwr.step` / `tps2393apwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps2393a.pdf) (32 pp, sha256 `e90e0674b86a93ea`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps2393apwr-datasheet.pdf)