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TPS2390DGKR
Public Made by Adomby adom
Texas Instruments Monitors & Reset Circuits, VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# TPS2390DGKR++**Texas Instruments** · Monitors & Reset Circuits · VSSOP-8-0.65mm++TPS2390DGKR from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | FAULT | output | Open-drain, active-low fault output that is high impedance when EN is deasserted or the load current is below the programmed limit, and is pulled low to −VIN when a latched fault occurs. |+| 2 | EN | input | Enable input referenced to −VIN that turns power to the load on or off; pulling it above the nominal 1.4-V threshold enables GATE and starts the load current ramp, and a low level disables the LCA and applies a large pull-down to the FET gate. |+| 3 | FLTTIME | bidirectional | Fault-timeout programming pin; an external capacitor from FLTTIME to −VIN sets the fault timeout period, which is charged to the 4-V fault threshold. |+| 4 | IRAMP | bidirectional | Inrush slew-rate programming pin; an external capacitor from IRAMP to −VIN sets the load current slew rate on turn-on, and is discharged and held low when the output is disabled. |+| 5 | −VIN | power_in | Negative supply input and reference pin connected to the input supply negative rail, essentially the GND/VSS of the device to which all input, output and internal circuitry is referenced; the nominal input supply is −36 V to −80 V. |+| 6 | ISENS | input | Current sense input fed through an external low-value resistor to −VIN; the HSPM limits this voltage to 40 mV during ramp-up, and a fast overload above 100 mV pulls GATE low rapidly. |+| 7 | GATE | output | Gate drive for the external N-channel pass FET, driven by the linear current amplifier to about 14 V (VOH 11 V to 17 V) to fully enhance the FET once the load has ramped up. |+| 8 | RTN | power_in | Positive supply input connected directly to the return node of the input power bus, from which internal regulators derive the device's internal supply levels; the absolute maximum input voltage range is −0.3 V to 100 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-8-0.65mm |+| Category | Power Supply Chip |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `TPS2390DGKR`+- Footprint: `Package_SO:VSSOP-8_2.3x2mm_P0.5mm`+- 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)+- 3D model files: `tps2390dgkr-etched.step` / `tps2390dgkr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2390dgkr.step` / `tps2390dgkr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps2390.pdf) (24 pp, sha256 `b85e5611df7ad276`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps2390dgkr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power supply chip",+ "tps2390dgkr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "tps2390dgkr.kicad_sym",+ "tps2390dgkr.kicad_mod",+ "tps2390dgkr.glb",+ "tps2390dgkr.step",+ "tps2390dgkr.lbr",+ "docs/hero.png",+ "docs/tps2390dgkr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "tps2390dgkr-hero.glb",+ "tps2390dgkr-hero.overlay.json"+ ],+ "component": {+ "mpn": "TPS2390DGKR",+ "manufacturer": "Texas Instruments",+ "package": "VSSOP-8-0.65mm",+ "pin_count": 8,+ "category": "Power Supply Chip",+ "subcategory": "Monitors & Reset Circuits",+ "datasheet": "https://www.ti.com/lit/ds/symlink/tps2390.pdf",+ "parts": {+ "symbol": "tps2390dgkr.kicad_sym",+ "footprint": "tps2390dgkr.kicad_mod",+ "model_3d": "tps2390dgkr-hero.glb",+ "model_3d_plain": "tps2390dgkr.glb",+ "model_3d_step": "tps2390dgkr-etched.step",+ "model_3d_step_plain": "tps2390dgkr.step",+ "lbr": "tps2390dgkr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2678317",+ "digikey": "TPS2390DGKR-ND",+ "mouser": "595-TPS2390DGKR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T16:11:58Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "TPS2390DGKR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-TPS2390DGKR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "FAULT",+ "type": "output",+ "description": "Open-drain, active-low fault output that is high impedance when EN is deasserted or the load current is below the programmed limit, and is pulled low to −VIN when a latched fault occurs."+ },+ {+ "number": "2",+ "name": "EN",+ "type": "input",+ "description": "Enable input referenced to −VIN that turns power to the load on or off; pulling it above the nominal 1.4-V threshold enables GATE and starts the load current ramp, and a low level disables the LCA and applies a large pull-down to the FET gate."+ },+ {+ "number": "3",+ "name": "FLTTIME",+ "type": "bidirectional",+ "description": "Fault-timeout programming pin; an external capacitor from FLTTIME to −VIN sets the fault timeout period, which is charged to the 4-V fault threshold."+ },+ {+ "number": "4",+ "name": "IRAMP",+ "type": "bidirectional",+ "description": "Inrush slew-rate programming pin; an external capacitor from IRAMP to −VIN sets the load current slew rate on turn-on, and is discharged and held low when the output is disabled."+ },+ {+ "number": "5",+ "name": "−VIN",+ "type": "power_in",+ "description": "Negative supply input and reference pin connected to the input supply negative rail, essentially the GND/VSS of the device to which all input, output and internal circuitry is referenced; the nominal input supply is −36 V to −80 V."+ },+ {+ "number": "6",+ "name": "ISENS",+ "type": "input",+ "description": "Current sense input fed through an external low-value resistor to −VIN; the HSPM limits this voltage to 40 mV during ramp-up, and a fast overload above 100 mV pulls GATE low rapidly."+ },+ {+ "number": "7",+ "name": "GATE",+ "type": "output",+ "description": "Gate drive for the external N-channel pass FET, driven by the linear current amplifier to about 14 V (VOH 11 V to 17 V) to fully enhance the FET once the load has ramped up."+ },+ {+ "number": "8",+ "name": "RTN",+ "type": "power_in",+ "description": "Positive supply input connected directly to the return node of the input power bus, from which internal regulators derive the device's internal supply levels; the absolute maximum input voltage range is −0.3 V to 100 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Package name: the datasheet calls the DGK package 'MSOP-8' in the text and 'VSSOP (DGK)' in the pack; RTN and −VIN are typed as power_in per KiCad convention for supply pins, even though the datasheet's; Pin 1 and pin 8 ordering was cross-checked between the DGK top-view drawing (page 1) and the termina"+ ],+ "pages_sent": 9,+ "cost_usd": 0.0564,+ "at": "2026-10-08T16:11:39"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/tps2390.pdf",+ "pages": 24,+ "sha256": "b85e5611df7ad276",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps2390dgkr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3.1,+ 2,+ 0.85+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "353552981eef35cb93635057d4aeb89aef22648c77af6fd095e328bfe6b834bd",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps2390dgkr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 3.1,+ 2,+ 0.85+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "34f21936ba5ec4480379e571455439d964f5205466f28e02db537817847f2d20",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}