component
TPS2390DGKR
Public Made by Adomby adom
Texas Instruments Monitors & Reset Circuits, VSSOP-8-0.65mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS2390DGKR
Texas Instruments · Monitors & Reset Circuits · VSSOP-8-0.65mm
TPS2390DGKR from Texas Instruments, in a VSSOP-8-0.65mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FAULT | output | Open-drain, active-low fault output that is high impedance when EN is deasserted or the load current is below the programmed limit, and is pulled low to −VIN when a latched fault occurs. |
| 2 | EN | input | Enable input referenced to −VIN that turns power to the load on or off; pulling it above the nominal 1.4-V threshold enables GATE and starts the load current ramp, and a low level disables the LCA and applies a large pull-down to the FET gate. |
| 3 | FLTTIME | bidirectional | Fault-timeout programming pin; an external capacitor from FLTTIME to −VIN sets the fault timeout period, which is charged to the 4-V fault threshold. |
| 4 | IRAMP | bidirectional | Inrush slew-rate programming pin; an external capacitor from IRAMP to −VIN sets the load current slew rate on turn-on, and is discharged and held low when the output is disabled. |
| 5 | −VIN | power_in | Negative supply input and reference pin connected to the input supply negative rail, essentially the GND/VSS of the device to which all input, output and internal circuitry is referenced; the nominal input supply is −36 V to −80 V. |
| 6 | ISENS | input | Current sense input fed through an external low-value resistor to −VIN; the HSPM limits this voltage to 40 mV during ramp-up, and a fast overload above 100 mV pulls GATE low rapidly. |
| 7 | GATE | output | Gate drive for the external N-channel pass FET, driven by the linear current amplifier to about 14 V (VOH 11 V to 17 V) to fully enhance the FET once the load has ramped up. |
| 8 | RTN | power_in | Positive supply input connected directly to the return node of the input power bus, from which internal regulators derive the device's internal supply levels; the absolute maximum input voltage range is −0.3 V to 100 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VSSOP-8-0.65mm |
| Category | Power Supply Chip |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS2390DGKR - Footprint:
Package_SO:VSSOP-8_2.3x2mm_P0.5mm - 3D model: VSSOP-8-0.65mm (KiCad packages3D, STEP)
- 3D model files:
tps2390dgkr-etched.step/tps2390dgkr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2390dgkr.step/tps2390dgkr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (24 pp, sha256
b85e5611df7ad276, retrieved 2026-10-08, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).