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TPS23881RTQR

Texas Instruments · Ethernet Transceivers · QFN-56-EP(8x8)

TPS23881RTQR from Texas Instruments, in a QFN-56-EP(8x8). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GAT1 output Channel 1 gate drive output to the external N-channel MOSFET; leave floating if unused.
2 SEN1 input Channel 1 current-sense input referenced to KSENSA via the 0.200Ω sense resistor; connect to GND if the channel is unused.
3 DRAIN1 input Channel 1 output voltage monitor and detection sense; may be floated or grounded if unused.
4 KSENSA input Kelvin point connection for SEN1 and SEN2.
5 DRAIN2 input Channel 2 output voltage monitor and detection sense; may be floated or grounded if unused.
6 SEN2 input Channel 2 current-sense input referenced to KSENSA via the 0.200Ω sense resistor; connect to GND if the channel is unused.
7 GAT2 output Channel 2 gate drive output to the external N-channel MOSFET; leave floating if unused.
8 GAT3 output Channel 3 gate drive output to the external N-channel MOSFET; leave floating if unused.
9 SEN3 input Channel 3 current-sense input referenced to KSENSB via the 0.200Ω sense resistor; connect to GND if the channel is unused.
10 DRAIN3 input Channel 3 output voltage monitor and detection sense; may be floated or grounded if unused.
11 KSENSB input Kelvin point connection for SEN3 and SEN4.
12 DRAIN4 input Channel 4 output voltage monitor and detection sense; may be floated or grounded if unused.
13 SEN4 input Channel 4 current-sense input referenced to KSENSB via the 0.200Ω sense resistor; connect to GND if the channel is unused.
14 GAT4 output Channel 4 gate drive output to the external N-channel MOSFET; leave floating if unused.
15 NC unconnected No connect; internally biased at 1/3 or 2/3 of VPWR to grade the VPWR voltage gradient, keep open.
16 NC unconnected No connect; internally biased at 1/3 or 2/3 of VPWR to grade the VPWR voltage gradient, keep open.
17 VPWR power_in Analog 54V positive supply (44V to 57V recommended, 70V absolute max), bypassed with 0.1µF to AGND.
18 NC unconnected No connect; internally biased at 1/3 or 2/3 of VPWR to grade the VPWR voltage gradient, keep open.
19 NC unconnected No connect; internally biased at 1/3 or 2/3 of VPWR to grade the VPWR voltage gradient, keep open.
20 TEST4 bidirectional Internal test pin used for test purposes only; keep open.
21 AGND power_in Analog ground; connect to the GND plane and exposed thermal pad.
22 NC unconnected No connect; keep open.
23 TEST1 bidirectional Internal test pin used for test purposes only (internal 50kΩ typical pull-down); keep open.
24 TEST2 bidirectional Internal test pin used for test purposes only (internal 50kΩ typical pull-down); keep open.
25 TEST3 bidirectional Internal test pin used for test purposes only; keep open.
26 TEST0 bidirectional Internal test pin used for test purposes only (internal 50kΩ typical pull-up); keep open.
27 NC unconnected No connect; keep open.
28 NC unconnected No connect; keep open.
29 GAT5 output Channel 5 gate drive output to the external N-channel MOSFET; leave floating if unused.
30 SEN5 input Channel 5 current-sense input referenced to KSENSC via the 0.200Ω sense resistor; connect to GND if the channel is unused.
31 DRAIN5 input Channel 5 output voltage monitor and detection sense; may be floated or grounded if unused.
32 KSENSC input Kelvin point connection for SEN5 and SEN6.
33 DRAIN6 input Channel 6 output voltage monitor and detection sense; may be floated or grounded if unused.
34 SEN6 input Channel 6 current-sense input referenced to KSENSC via the 0.200Ω sense resistor; connect to GND if the channel is unused.
35 GAT6 output Channel 6 gate drive output to the external N-channel MOSFET; leave floating if unused.
36 GAT7 output Channel 7 gate drive output to the external N-channel MOSFET; leave floating if unused.
37 SEN7 input Channel 7 current-sense input referenced to KSENSD via the 0.200Ω sense resistor; connect to GND if the channel is unused.
38 DRAIN7 input Channel 7 output voltage monitor and detection sense; may be floated or grounded if unused.
39 KSENSD input Kelvin point connection for SEN7 and SEN8.
40 DRAIN8 input Channel 8 output voltage monitor and detection sense; may be floated or grounded if unused.
41 SEN8 input Channel 8 current-sense input referenced to KSENSD via the 0.200Ω sense resistor; connect to GND if the channel is unused.
42 GAT8 output Channel 8 gate drive output to the external N-channel MOSFET; leave floating if unused.
43 VDD power_in 3.3V digital logic supply (3V to 3.6V recommended), bypassed with 0.1µF to DGND.
44 RESET input Active-low reset input that resets the device; internally pulled up to VDD.
45 INT output Open-drain interrupt output, pulled low when a bit in the interrupt register is set.
46 DGND power_in Digital ground; connect to the GND plane and exposed thermal pad.
47 TEST5 bidirectional Internal test pin used for test purposes only; keep open.
48 A1 input I2C address line A1, internally pulled up to VDD.
49 A2 input I2C address line A2, internally pulled up to VDD.
50 A3 input I2C address line A3, internally pulled up to VDD.
51 A4 input I2C address line A4, internally pulled up to VDD.
52 AUTO bidirectional Autonomous mode enable and selection pin: floating disables autonomous mode, RAUTO to GND selects the port power allocation, with a 10nF capacitor required when RAUTO is used.
53 SCL input Serial clock input for the I2C bus.
54 SDAI input Serial data input for the I2C bus; can be tied to SDAO in non-isolated systems.
55 SDAO output Open-drain I2C serial data output requiring an external pull-up; can be tied to SDAI in non-isolated systems.
56 OSS input Active-high fast shutdown input for channels 1-8, internally pulled down to DGND with a 1µs to 5µs deglitch filter.
57 EP power_in Exposed thermal pad; DGND and AGND must be connected to it for proper operation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-56-EP(8x8)
Category Interface
Pins 57

CAD (KiCad official)

  • Symbol: TPS23881RTQR
  • Footprint: Package_DFN_QFN:QFN-56-1EP_8x8mm_P0.5mm_EP4.5x5.2mm
  • 3D model: QFN-56-EP(8x8) (KiCad packages3D, STEP)
  • 3D model files: tps23881rtqr-etched.step / tps23881rtqr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps23881rtqr.step / tps23881rtqr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (133 pp, sha256 e4f4fdd814bbae94, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF