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Contents

README

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TPS2376DDAR-H

Texas Instruments · Power Over Ethernet Controllers · SO-8

TPS2376DDAR-H from Texas Instruments, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ILIM passive Connect a resistor from ILIM to VSS to set the start-up inrush current limit (R(ILIM) recommended 125 kΩ to 1000 kΩ; no external voltage should be applied).
2 CLASS passive Connect a resistor from CLASS to VSS to set the PD classification (255 Ω to 4420 Ω recommended; no external voltage should be applied).
3 DET passive Connect a 24.9-kΩ detection resistor from DET to VDD.
4 VSS power_in Return line on the source side of the TPS2376-H from the PSE, and the reference for the device voltage ratings.
5 RTN passive Switched output-side return line used as the low-side reference for the load, with 0 to 600 mA recommended sinking current and 0 to 57 V recommended input range.
6 PG output Open-drain, active-high power-good output referenced to RTN, with recommended sinking current of 0 to 2 mA.
7 UVLO input UVLO comparator input that controls pass-device turn-on and turn-off, connected to a resistor divider from VDD to VSS (absolute maximum 10 V).
8 VDD power_in Positive line from the rectified PSE input, with 0 to 57 V recommended input range and 100 V absolute maximum.
PAD PowerPAD power_in The PowerPAD must be connected to VSS, and the VSS copper on the board must be a large fill area to assist heat dissipation.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SO-8
Category Power Supply Chip
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Voltage VDD, RTN, DET, PG -0.3 100 V Referenced to VSS; I(RTN) = 0; over operating free-air temperature range 4
Voltage ILIM, UVLO -0.3 10 V Referenced to VSS; over operating free-air temperature range 4
Voltage CLASS -0.3 12 V Referenced to VSS; over operating free-air temperature range 4
Current, sinking PG 0 5 mA Over operating free-air temperature range 4
Current, sinking DET 0 1 mA Over operating free-air temperature range 4
Current, sourcing CLASS 0 50 mA Over operating free-air temperature range 4
Current, sourcing ILIM 0 1 mA Over operating free-air temperature range 4
Lead temperature 260 °C 1,6 mm (1/16 inch) from case for 10 seconds 4
Storage temperature Tstg -65 150 °C 4
ESD electrostatic discharge, HBM V(ESD) -2 2 kV Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 4
ESD IEC 61000-4-2 contact discharge at RJ-45 V(ESD) -8 8 kV IEC 61000-4-2 contact discharge at RJ-45 4
ESD IEC 61000-4-2 air-gap discharge at RJ-45 V(ESD) -15 15 kV IEC 61000-4-2 air-gap discharge at RJ-45 4
Input voltage range VDD, PG, RTN 0 57 V 4
Operating current range (sinking) RTN 0 600 mA 4
Classification resistor R(CLASS) 255 4420 Ω 4
Inrush limit program resistor R(ILIM) 125 1000 kΩ 4
Sinking current PG 0 2 mA 4
Operating junction temperature TJ TJ -40 125 °C IRTN ≤ 400 mA 4
Operating junction temperature TJ TJ -40 105 °C 400 mA < IRTN ≤ 600 mA 4
Operating free-air temperature TA TA -40 85 °C 4
Offset current 0.3 3 μA DET open, V(VDD) = V(RTN) = 1.9 V, measure I(VDD) + I(RTN) 5
Sleep current 4 12 μA DET open, V(VDD) = V(RTN) = 10.1 V, measure I(VDD) + I(RTN) 5
DET leakage current I(DET) 0.1 5 μA V(DET) = V(VDD) = 57 V, measure I(DET) 5
Detection current, V(VDD) = 1.4 V 53.7 56 58.3 μA V(RTN) = V(VDD), R(DET) = 24.9 kΩ, measure I(VDD) + I(RTN) + I(DET), V(VDD) = 1.4 V 5
Detection current, V(VDD) = 10.1 V 395 410 417 μA V(RTN) = V(VDD), R(DET) = 24.9 kΩ, measure I(VDD) + I(RTN) + I(DET), V(VDD) = 10.1 V 5
Classification current I(CLASS), R(CLASS) = 4420 Ω I(CLASS) 2.2 2.4 2.8 mA Measure I(VDD) + I(RTN), 13 V ≤ V(VDD) ≤ 21 V, V(VDD) = V(RTN), R(CLASS) = 4420 Ω 5
Classification current I(CLASS), R(CLASS) = 953 Ω I(CLASS) 10.3 10.6 11.3 mA Measure I(VDD) + I(RTN), 13 V ≤ V(VDD) ≤ 21 V, V(VDD) = V(RTN), R(CLASS) = 953 Ω 5
Classification current I(CLASS), R(CLASS) = 549 Ω I(CLASS) 17.7 18.3 19.5 mA Measure I(VDD) + I(RTN), 13 V ≤ V(VDD) ≤ 21 V, V(VDD) = V(RTN), R(CLASS) = 549 Ω 5
Classification current I(CLASS), R(CLASS) = 357 Ω I(CLASS) 27.1 28 29.5 mA Measure I(VDD) + I(RTN), 13 V ≤ V(VDD) ≤ 21 V, V(VDD) = V(RTN), R(CLASS) = 357 Ω 5
Classification current I(CLASS), R(CLASS) = 255 Ω I(CLASS) 38 39.4 41.2 mA Measure I(VDD) + I(RTN), 13 V ≤ V(VDD) ≤ 21 V, V(VDD) = V(RTN), R(CLASS) = 255 Ω 5
Classification lower threshold V(CL_ON) 10.2 11.3 13 V Regulator turns on, V(VDD) rising 5
Classification lower threshold hysteresis 1.6 1.8 1.95 V 5
Classification upper threshold V(CU_OFF) 21 21.9 23 V Regulator turns off, V(VDD) rising 5
Classification upper threshold hysteresis V(CU_H) 0.5 0.78 1 V 5
Classification leakage current Ilkg 1 μA V(CLASS) = 0 V, V(VDD) = 57 V 5
On resistance rDS(on) 0.58 1 Ω 5
Pass device leakage current 15 μA V(VDD) = V(RTN) = 30 V 5
Current limit 625 765 900 mA V(RTN) = 1 V 5
Inrush limit I(LIM) 160 224 296 mA V(RTN) = 2 V, R(ILIM) = 178 kΩ 5
Inrush current termination 85 91 100 % V(RTN) falling, R(ILIM) = 287 kΩ, inrush state→normal operation 5
Leakage current, ILIM 1 μA V(VDD) = 15 V, V(UVLO) = 0 V 5
PG voltage threshold rising 9.5 10 10.5 V V(RTN) rising; footnote 3: start with V(RTN) = 0 V, increase V(RTN) until PG switches 6
PG deglitch 75 150 225 μs Delay rising and falling PG 6
PG output low voltage 0.12 0.4 V I(PG) = 2 mA, V(RTN) = 34 V, V(VDD) = 38 V, V(RTN) falling 6
PG leakage current 0.1 1 μA V(PG) = 57 V, V(RTN) = 0 V 6
Voltage at UVLO rising, TPS2376-H V(UVLO_R) 2.43 2.49 2.57 V V(UVLO) rising 6
Voltage at UVLO falling, TPS2376-H V(UVLO_F) 1.87 1.93 1.98 V V(UVLO) falling 6
UVLO hysteresis, TPS2376-H 0.53 0.56 0.58 V 6
Thermal shutdown temperature 135 °C Temperature rising 6
Operating current I(VDD) I(VDD) 240 450 μA 6
Thermal shutdown hysteresis 20 °C 6
Junction-to-ambient thermal resistance, Modified High-K RθJA 58.6 °C/W Modified High-K (2 signal, 2 plane), JESD51, natural convection 5
Junction-to-ambient thermal resistance, Modified Low-K RθJA 50 °C/W Modified Low-K (2 signal, no plane), JESD51, natural convection 5
Junction-to-ambient thermal resistance, Best RθJA 45 °C/W Best case (2 signal, 2 plane, pad connected to plane per SLMA002), JESD51, natural convection 5

CAD (KiCad official)

  • Symbol: TPS2376DDAR-H
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SO-8 (KiCad packages3D, STEP)
  • 3D model files: tps2376ddar-h-etched.step / tps2376ddar-h-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2376ddar-h.step / tps2376ddar-h.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 7fa126f24c61c386, retrieved 2026-10-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF