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TPS2376D

Texas Instruments · Power Over Ethernet (PoE) Controllers · SOIC-8

TPS2376D from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ILIM passive A resistor from ILIM to VSS sets the start-up inrush current limit, with practical R(ILIM) limits of 62.5 kΩ to 500 kΩ (178 kΩ recommended for legacy PSEs), and the pin must not be left open or shorted to VSS.
2 CLASS passive An external resistor from CLASS to VSS sets the IEEE 802.3af PD classification (4420 Ω for class 0 down to 255 Ω for class 4, ±1%), and the pin must not be shorted to ground.
3 DET passive A 24.9 kΩ ±1% detection resistor connected from DET to VDD is required for valid PD detection and is across the line only when V(VDD) is between 1.4 V and 11.3 V.
4 VSS power_in This is the input supply negative rail (PSE-side return) that serves as the local ground for the device.
5 RTN power_out This is the switched negative power rail (switched output-side return) used as the low-side reference for downstream circuits, with recommended sinking operating current of 0 to 350 mA and absolute-maximum current of 515 mA.
6 PG output This is an open-drain, active-high power-good output that is pulled to RTN except when the internal MOSFET is enabled and not in inrush limiting, with recommended sinking current of 0 to 2 mA and at least 4 V required between VDD and RTN for assured performance.
7 UVLO input On the TPS2376 only, an external resistor divider from VDD to VSS sets the adjustable upper and lower UVLO thresholds, with the recommended input range of 0 to 5 V; on the TPS2375 and TPS2377 this pin is NC.
8 VDD power_in This is the positive rectified PSE input supply, with recommended operating voltage range of 0 to 57 V and an absolute maximum of 100 V relative to VSS.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TPS2376D
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps2376d-etched.step / tps2376d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2376d.step / tps2376d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (28 pp, sha256 6559d81e1161e551, retrieved 2026-10-08, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF