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TPS23754PWP

Public Made by Adom

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Texas Instruments Power Over Ethernet (PoE) Controllers, HTSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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TPS23754PWP

Texas Instruments · Power Over Ethernet (PoE) Controllers · HTSSOP-20

TPS23754PWP from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CTL input Control loop input to pulse-width modulator (PWM) driven by output regulation feedback; use VB as pullup.
2 VB power_out 5.1-V regulated bias rail for DC-DC control circuits and feedback optocoupler; bypass with 0.1-μF capacitor to ARTN.
3 CS bidirectional Current sense input for DC-DC converter switching MOSFET connected to RCS resistor; internal slope compensation and current limiting.
4 COM power_in Gate driver return path; connect to ARTN and RTN on circuit board.
5 GATE output Gate drive output for main switching MOSFET of DC-DC converter; held low when converter is disabled.
6 VC bidirectional DC-DC controller bias voltage supply; connect minimum 0.47-μF ceramic capacitor to ARTN and larger capacitor for power start-up.
7 GAT2 output Gate drive output for secondary switching MOSFET of DC-DC converter; low when converter is disabled.
8 ARTN power_in DC-DC converter analog return; tie to RTN and COM on circuit board.
9 RTN power_in Output terminal of PoE hotswap MOSFET; serves as PoE power return after internal switch.
10 VSS power_in Negative power rail connection for PoE source.
11 VDD1 power_in Source of DC-DC converter start-up current; typically connect to VDD for normal applications.
12 VDD power_in Positive PoE input power rail supplying PoE interface circuits; bypass with 0.1-μF capacitor and protect with TVS.
13 DEN bidirectional PoE detection pin; connect 24.9-kΩ resistor to VDD for detection signature or pull to VSS to disable hotswap MOSFET.
14 PPD input Pre-power detection input; raising above 1.55 V enables hotswap MOSFET and activates T2P output.
15 CLS input Classification current programming pin; connect resistor to VSS to set device power class per IEEE 802.3at standard.
16 DT input Dead-time programming pin; connect resistor to ARTN to set delay between GATE and GAT2 to prevent MOSFET overlap.
17 APD input Adapter presence detection input; raising above 1.5 V disables hotswap switch and forces T2P active.
18 BLNK input Current-sense blanking period pin; connect to ARTN for internal blanking or resistor for programmable blanking period.
19 FRS input Frequency and synchronization pin; connect resistor to ARTN to program converter switching frequency.
20 T2P output Type 2 Power Detection output; active low when Type 2 classification, PPD, or APD is active.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package HTSSOP-20
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS23754PWP
  • Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
  • 3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps23754pwp-etched.step / tps23754pwp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps23754pwp.step / tps23754pwp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (48 pp, sha256 c59f93aeb3bed3e6, retrieved 2026-10-06, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF