TPS2373-3RGWR

Texas Instruments · Power Over Ethernet Controllers · VQFN-20(5x5)

TPS2373-3RGWR from Texas Instruments, in a VQFN-20(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	VDD	power_in	Positive PoE input supply rail (recommended 0 to 57 V, absolute maximum 100 V), bypassed to VSS with a 0.1 µF capacitor.
2	DEN	bidirectional	A 24.9 kΩ resistor between DEN and VDD provides the PoE detection signature, and pulling DEN to VSS during powered operation turns off the hot-swap MOSFET.
3	CLSA	output	A resistor from CLSA to VSS sets the first classification current (Table 1 values, for example 63.4 Ω for class 4), with about 2.5 V applied while VDD-VSS is between 10.9 V and 22 V.
4	VSS	power_in	Negative supply rail from the PoE source, which must be connected to the exposed pad.
5	VSS	power_in	Negative supply rail from the PoE source, which must be connected to the exposed pad.
6	CLSB	output	A resistor from CLSB to VSS sets the second and all subsequent classification currents, with about 2.5 V applied while VDD-VSS is between 10.9 V and 22 V.
7	REF	output	Internal 1.5 V voltage reference, which requires a 1% 49.9 kΩ resistor from REF to VSS.
8	AMPS_CTL	output	Automatic MPS output, where a resistor from AMPS_CTL to VSS rated for the MPS current sets the pulse amplitude and leaving it open disables auto-MPS.
9	MPS_DUTY	input	MPS duty-cycle select referenced to VSS and driven by a precision current source (limited to about 5.5 V), where open, about 60.4 kΩ to VSS, or short to VSS selects 5.4%, 8.1%, or 12.5% duty cycle.
10	APD	input	Auxiliary power detect input, where raising it more than 1.65 V above RTN disables the hot-swap MOSFET, forces TPH active (low), and turns off TPL and BT; connect to RTN if unused.
11	RTN	passive	Drain of the PoE hot-swap MOSFET and the return path from the load to the controller, rated 0 to 57 V recommended with 1.2 A sink current for the TPS2373-3.
12	RTN	passive	Drain of the PoE hot-swap MOSFET and the return path from the load to the controller, rated 0 to 57 V recommended with 1.2 A sink current for the TPS2373-3.
13	PG	output	Open-drain, active-high power-good output referenced to RTN that is pulled to RTN during inrush and high-impedance afterward, with a recommended sink current of 3 mA.
14	VC_OUT	output	Low-voltage supply output for the PWM controller, normally bypassed to RTN with 1 µF and requiring a larger capacitor if a 12 V adapter is used.
15	VC_IN	input	Auxiliary bias input, typically from the converter transformer aux winding, bypassed to RTN with 0.1 µF and recommended for 0 to 15 V relative to RTN.
16	UVLO_SEL	input	UVLO select referenced to RTN and internally pulled up to 5.5 V, where it is left open for a PWM falling UVLO above 7.25 V and pulled low for a value between 4.25 V and 7.25 V.
17	TPL	output	PSE power-allocation output (binary coded), open-drain and active-high referenced to RTN, which goes open-circuit when an auxiliary adapter is detected on APD.
18	TPH	output	PSE power-allocation output (binary coded), open-drain and referenced to RTN, which is pulled low when an auxiliary adapter is detected on APD.
19	BT	output	Open-drain, active-low output referenced to RTN that indicates an IEEE 802.3bt (Type 3 or 4) PSE, which goes open-circuit when an adapter is detected on APD.
20	NC	unconnected	No-connect pin that must be left open.
21	PAD	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-20(5x5)
Category	Power Supply Chip
Pins	21

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Input voltage range RTN, VDD		0		57	V		6
APD to RTN voltage range		0		5	V		6
VC_IN to RTN voltage range		0		15	V		6
TPH, TPL, BT to RTN voltage range		0		57	V		6
PG to RTN voltage range		0		57	V		6
RTN sink current (TPS2373-3)				1.2	A		6
PG, TPH, TPL, BT sink current				3	mA		6
VC_OUT source current				20	mA		6
CLSA, CLSB resistance				60	Ω		6
AMPS_CTL resistance		1			kΩ		6
REF resistor	REF	48.9	49.9	50.9	kΩ		6
APD to RTN resistance				200			6
Junction temperature		-40		125	°C		6
DEN bias current		3	4.8	14	µA	DEN 断开，VVDD = 10.1V，测量 ISUPPLY，不在标记中	7
VPD_DIS disable threshold (DEN falling)	VPD_DIS	3	3.7	5	V	DEN 下降	7
APD rising threshold voltage (measured to VRTN)	VAPDEN	1.38		1.82	V	VAPD 上升，测量到 VRTN	7
APD pulldown resistance	RAPD	2.8			MΩ	V(APD-RTN) = 5V，测量 RAPD	7
Classification characteristic current, RCLSA or RCLSB = 1210Ω	ICLS	2.1	2.5	2.9	mA	13V ≤ VVDD ≤ 21V，测量 IVDD + IDEN + IRTN；RCLSA 或 RCLSB = 1210Ω	7
Classification characteristic current, RCLSA or RCLSB = 63.4Ω	ICLS	38	39.9	42	mA	13V ≤ VVDD ≤ 21V，测量 IVDD + IDEN + IRTN；RCLSA 或 RCLSB = 63.4Ω	7
Class lower-limit threshold (VDD rising)	VCL_ON	11.9	12.5	13	V	VVDD 上升，ICLS ↑	7
Class upper-limit threshold (VDD rising)	VCU_ON	21	22	23	V	VVDD 上升，ICLS ↓	7
Mark reset threshold	VMSR	3	3.9	5	V	VVDD 下降	7
rDS(on) on-resistance (TPS2373-3)	rDS(on)		0.3	0.55	Ω		7
Current limit (TPS2373-3)		1.55	1.85	2.2	A	VRTN = 1.5V	7
Inrush termination (surge current percentage)		65	90	99	%	浪涌电流百分比	7
Foldback threshold (VRTN rising)		12.5	14.5	15.5	V	VRTN 上升	7
PG output low voltage			0.27	0.5	V	测量 VPG, VRTN，IPG = 2mA，VRTN = 2V，VDD：20V → 48V	8
TPL output low voltage	VTPL		0.27	0.5	V	ITPL = 2mA，VRTN = 0V	8
TPH output low voltage	VTPH		0.27	0.5	V	ITPH = 2mA，VRTN = 0V	8
BT output low voltage	VBT		0.27	0.5	V	IBT = 2mA，VRTN = 0V	8
TPL, TPH, BT delay	tTPLHBT	20	24	28	ms	从启动期间 VC_IN 高电平且 PG 断开到 TPH 和/或 TPL 和/或 BT 有效	8
UVLO rising threshold (VDD rising)	VUVLO_R	36.3	38.1	40	V	VVDD 上升	8
UVLO falling threshold (VDD falling)	VUVLO_F	30.5	32	33.6	V	VVDD 下降	8
Operating current			550	800	µA	40V ≤ VVDD ≤ 57V，启动已完成	8
VC_OUT undervoltage falling threshold	VVCO_UV	6.45	6.9	7.35	V	VVC_OUT-RTN 下降	8
VC_OUT undervoltage falling threshold (UVLO_SEL to RTN)	VVCO_UV	3.45	3.9	4.25	V	VVC_OUT-RTN 下降，UVLO_SEL 至 RTN	8
Startup current source, VDD ≥ 28V	IVCOUT	21.5	26	29	mA	VAPD-RTN = 2.5V，VVDD ≥ 28V，VVC_OUT-RTN = 13.6V	8
Startup current source, VDD ≥ 10V	IVCOUT	8	12.5	19	mA	VAPD-RTN = 2.5V，VVDD ≥ 10V，VVC_OUT-RTN = 7V	8
VC_OUT startup voltage (IVC_OUT = 0mA)	VVC_ST	13.8	15		V	测量启动期间的 VVC_OUT，IVC_OUT = 0mA	8
VC_OUT UVLO select threshold	VUVLO_SEL	1.8	2.1	2.3	V	至 RTN	8
VC_IN rising threshold to turn on VC switch	VVCIN_ON	8	8.5	9	V	至 RTN	8
VC on-resistance (VVDD ≥ 28V)	rVC			13.3	Ω	VAPD-RTN = 2.5V，VVDD ≥ 28V，VVC_IN-RTN = 10V	8
VC on-resistance (VVDD ≥ 20V)	rVC			15.5	Ω	VAPD-RTN = 2.5V，VVDD ≥ 20V，VVC_IN-RTN = 10V	8
Startup current source turn-off delay	tSTUP_OFF	20	24	28	ms	从 VC 开关导通时	8
Startup current source timeout	tSTUP_OUT	47.5	50	53	ms	从启动源开启到关闭	8
MPS DC supply current				0.8	mA	启动已完成，IRTN = 0mA	8
AMPS_CTL pulse voltage		23.1	24	24.9	V	启动已完成，IRTN < 20mA，RMPS = 1KΩ 至 12kΩ	8
Auto MPS falling current threshold		18	28	38	mA	启动已完成，IRTN 阈值用于产生 AMPS_CTL 脉冲	9
MPS pulse duty cycle (Type 1-2 PSE)		25.8	26.1	26.4	%	适用于 1-2 型 PSE	9
MPS pulse on-time (Type 1-2 PSE)		76	81.5	87	ms	适用于 1-2 型 PSE	9
MPS pulse off-time (Type 1-2 PSE)		230		250	ms	适用于 1-2 型 PSE	9
MPS pulse duty cycle (Type 3-4), RMPS_DUTY > 230kΩ		5.2	5.43	5.6	%	RMPS_DUTY > 230kΩ	9
MPS pulse on-time (Type 3-4), RMPS_DUTY > 230kΩ		14.5	15	15.7	ms	RMPS_DUTY > 230kΩ	9
MPS pulse duty cycle (Type 3-4), RMPS_DUTY < 8kΩ		12.3	12.5	12.7	%	RMPS_DUTY < 8kΩ	9
MPS pulse on-time (Type 3-4), RMPS_DUTY < 8kΩ		36	37.5	39	ms	RMPS_DUTY < 8kΩ	9
Thermal shutdown junction temperature (rising)	TJ	140	158		°C	TJ 上升	10
Junction-to-ambient thermal resistance (TPS2373-3, RGW)	RθJA		40.2		°C/W		6
Junction-to-case (top) thermal resistance (TPS2373-3, RGW)	RθJC(top)		34.6		°C/W		6
Junction-to-board thermal resistance (TPS2373-3, RGW)	RθJB		17.9		°C/W		6
Junction-to-case (bottom) thermal resistance (TPS2373-3, RGW)	RθJC(bot)		3.4		°C/W		6

CAD (KiCad official)

Symbol: TPS2373-3RGWR
Footprint: Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm
3D model: VQFN-20(5x5) (KiCad packages3D, STEP)
3D model files: tps2373-3rgwr-etched.step / tps2373-3rgwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2373-3rgwr.step / tps2373-3rgwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (46 pp, sha256 215423c8efd715bb, retrieved 2026-10-26, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TPS2373-3RGWR

**Texas Instruments** · Power Over Ethernet Controllers · VQFN-20(5x5)

TPS2373-3RGWR from Texas Instruments, in a VQFN-20(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive PoE input supply rail (recommended 0 to 57 V, absolute maximum 100 V), bypassed to VSS with a 0.1 µF capacitor. |
| 2 | DEN | bidirectional | A 24.9 kΩ resistor between DEN and VDD provides the PoE detection signature, and pulling DEN to VSS during powered operation turns off the hot-swap MOSFET. |
| 3 | CLSA | output | A resistor from CLSA to VSS sets the first classification current (Table 1 values, for example 63.4 Ω for class 4), with about 2.5 V applied while VDD-VSS is between 10.9 V and 22 V. |
| 4 | VSS | power_in | Negative supply rail from the PoE source, which must be connected to the exposed pad. |
| 5 | VSS | power_in | Negative supply rail from the PoE source, which must be connected to the exposed pad. |
| 6 | CLSB | output | A resistor from CLSB to VSS sets the second and all subsequent classification currents, with about 2.5 V applied while VDD-VSS is between 10.9 V and 22 V. |
| 7 | REF | output | Internal 1.5 V voltage reference, which requires a 1% 49.9 kΩ resistor from REF to VSS. |
| 8 | AMPS_CTL | output | Automatic MPS output, where a resistor from AMPS_CTL to VSS rated for the MPS current sets the pulse amplitude and leaving it open disables auto-MPS. |
| 9 | MPS_DUTY | input | MPS duty-cycle select referenced to VSS and driven by a precision current source (limited to about 5.5 V), where open, about 60.4 kΩ to VSS, or short to VSS selects 5.4%, 8.1%, or 12.5% duty cycle. |
| 10 | APD | input | Auxiliary power detect input, where raising it more than 1.65 V above RTN disables the hot-swap MOSFET, forces TPH active (low), and turns off TPL and BT; connect to RTN if unused. |
| 11 | RTN | passive | Drain of the PoE hot-swap MOSFET and the return path from the load to the controller, rated 0 to 57 V recommended with 1.2 A sink current for the TPS2373-3. |
| 12 | RTN | passive | Drain of the PoE hot-swap MOSFET and the return path from the load to the controller, rated 0 to 57 V recommended with 1.2 A sink current for the TPS2373-3. |
| 13 | PG | output | Open-drain, active-high power-good output referenced to RTN that is pulled to RTN during inrush and high-impedance afterward, with a recommended sink current of 3 mA. |
| 14 | VC_OUT | output | Low-voltage supply output for the PWM controller, normally bypassed to RTN with 1 µF and requiring a larger capacitor if a 12 V adapter is used. |
| 15 | VC_IN | input | Auxiliary bias input, typically from the converter transformer aux winding, bypassed to RTN with 0.1 µF and recommended for 0 to 15 V relative to RTN. |
| 16 | UVLO_SEL | input | UVLO select referenced to RTN and internally pulled up to 5.5 V, where it is left open for a PWM falling UVLO above 7.25 V and pulled low for a value between 4.25 V and 7.25 V. |
| 17 | TPL | output | PSE power-allocation output (binary coded), open-drain and active-high referenced to RTN, which goes open-circuit when an auxiliary adapter is detected on APD. |
| 18 | TPH | output | PSE power-allocation output (binary coded), open-drain and referenced to RTN, which is pulled low when an auxiliary adapter is detected on APD. |
| 19 | BT | output | Open-drain, active-low output referenced to RTN that indicates an IEEE 802.3bt (Type 3 or 4) PSE, which goes open-circuit when an adapter is detected on APD. |
| 20 | NC | unconnected | No-connect pin that must be left open. |
| 21 | PAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-20(5x5) |
| Category | Power Supply Chip |
| Pins | 21 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage range RTN, VDD |  | 0 |  | 57 | V |  | 6 |
| APD to RTN voltage range |  | 0 |  | 5 | V |  | 6 |
| VC_IN to RTN voltage range |  | 0 |  | 15 | V |  | 6 |
| TPH, TPL, BT to RTN voltage range |  | 0 |  | 57 | V |  | 6 |
| PG to RTN voltage range |  | 0 |  | 57 | V |  | 6 |
| RTN sink current (TPS2373-3) |  |  |  | 1.2 | A |  | 6 |
| PG, TPH, TPL, BT sink current |  |  |  | 3 | mA |  | 6 |
| VC_OUT source current |  |  |  | 20 | mA |  | 6 |
| CLSA, CLSB resistance |  |  |  | 60 | Ω |  | 6 |
| AMPS_CTL resistance |  | 1 |  |  | kΩ |  | 6 |
| REF resistor | REF | 48.9 | 49.9 | 50.9 | kΩ |  | 6 |
| APD to RTN resistance |  |  |  | 200 |  |  | 6 |
| Junction temperature |  | -40 |  | 125 | °C |  | 6 |
| DEN bias current |  | 3 | 4.8 | 14 | µA | DEN 断开，VVDD = 10.1V，测量 ISUPPLY，不在标记中 | 7 |
| VPD_DIS disable threshold (DEN falling) | VPD_DIS | 3 | 3.7 | 5 | V | DEN 下降 | 7 |
| APD rising threshold voltage (measured to VRTN) | VAPDEN | 1.38 |  | 1.82 | V | VAPD 上升，测量到 VRTN | 7 |
| APD pulldown resistance | RAPD | 2.8 |  |  | MΩ | V(APD-RTN) = 5V，测量 RAPD | 7 |
| Classification characteristic current, RCLSA or RCLSB = 1210Ω | ICLS | 2.1 | 2.5 | 2.9 | mA | 13V ≤ VVDD ≤ 21V，测量 IVDD + IDEN + IRTN；RCLSA 或 RCLSB = 1210Ω | 7 |
| Classification characteristic current, RCLSA or RCLSB = 63.4Ω | ICLS | 38 | 39.9 | 42 | mA | 13V ≤ VVDD ≤ 21V，测量 IVDD + IDEN + IRTN；RCLSA 或 RCLSB = 63.4Ω | 7 |
| Class lower-limit threshold (VDD rising) | VCL_ON | 11.9 | 12.5 | 13 | V | VVDD 上升，ICLS ↑ | 7 |
| Class upper-limit threshold (VDD rising) | VCU_ON | 21 | 22 | 23 | V | VVDD 上升，ICLS ↓ | 7 |
| Mark reset threshold | VMSR | 3 | 3.9 | 5 | V | VVDD 下降 | 7 |
| rDS(on) on-resistance (TPS2373-3) | rDS(on) |  | 0.3 | 0.55 | Ω |  | 7 |
| Current limit (TPS2373-3) |  | 1.55 | 1.85 | 2.2 | A | VRTN = 1.5V | 7 |
| Inrush termination (surge current percentage) |  | 65 | 90 | 99 | % | 浪涌电流百分比 | 7 |
| Foldback threshold (VRTN rising) |  | 12.5 | 14.5 | 15.5 | V | VRTN 上升 | 7 |
| PG output low voltage |  |  | 0.27 | 0.5 | V | 测量 VPG, VRTN，IPG = 2mA，VRTN = 2V，VDD：20V → 48V | 8 |
| TPL output low voltage | VTPL |  | 0.27 | 0.5 | V | ITPL = 2mA，VRTN = 0V | 8 |
| TPH output low voltage | VTPH |  | 0.27 | 0.5 | V | ITPH = 2mA，VRTN = 0V | 8 |
| BT output low voltage | VBT |  | 0.27 | 0.5 | V | IBT = 2mA，VRTN = 0V | 8 |
| TPL, TPH, BT delay | tTPLHBT | 20 | 24 | 28 | ms | 从启动期间 VC_IN 高电平且 PG 断开到 TPH 和/或 TPL 和/或 BT 有效 | 8 |
| UVLO rising threshold (VDD rising) | VUVLO_R | 36.3 | 38.1 | 40 | V | VVDD 上升 | 8 |
| UVLO falling threshold (VDD falling) | VUVLO_F | 30.5 | 32 | 33.6 | V | VVDD 下降 | 8 |
| Operating current |  |  | 550 | 800 | µA | 40V ≤ VVDD ≤ 57V，启动已完成 | 8 |
| VC_OUT undervoltage falling threshold | VVCO_UV | 6.45 | 6.9 | 7.35 | V | VVC_OUT-RTN 下降 | 8 |
| VC_OUT undervoltage falling threshold (UVLO_SEL to RTN) | VVCO_UV | 3.45 | 3.9 | 4.25 | V | VVC_OUT-RTN 下降，UVLO_SEL 至 RTN | 8 |
| Startup current source, VDD ≥ 28V | IVCOUT | 21.5 | 26 | 29 | mA | VAPD-RTN = 2.5V，VVDD ≥ 28V，VVC_OUT-RTN = 13.6V | 8 |
| Startup current source, VDD ≥ 10V | IVCOUT | 8 | 12.5 | 19 | mA | VAPD-RTN = 2.5V，VVDD ≥ 10V，VVC_OUT-RTN = 7V | 8 |
| VC_OUT startup voltage (IVC_OUT = 0mA) | VVC_ST | 13.8 | 15 |  | V | 测量启动期间的 VVC_OUT，IVC_OUT = 0mA | 8 |
| VC_OUT UVLO select threshold | VUVLO_SEL | 1.8 | 2.1 | 2.3 | V | 至 RTN | 8 |
| VC_IN rising threshold to turn on VC switch | VVCIN_ON | 8 | 8.5 | 9 | V | 至 RTN | 8 |
| VC on-resistance (VVDD ≥ 28V) | rVC |  |  | 13.3 | Ω | VAPD-RTN = 2.5V，VVDD ≥ 28V，VVC_IN-RTN = 10V | 8 |
| VC on-resistance (VVDD ≥ 20V) | rVC |  |  | 15.5 | Ω | VAPD-RTN = 2.5V，VVDD ≥ 20V，VVC_IN-RTN = 10V | 8 |
| Startup current source turn-off delay | tSTUP_OFF | 20 | 24 | 28 | ms | 从 VC 开关导通时 | 8 |
| Startup current source timeout | tSTUP_OUT | 47.5 | 50 | 53 | ms | 从启动源开启到关闭 | 8 |
| MPS DC supply current |  |  |  | 0.8 | mA | 启动已完成，IRTN = 0mA | 8 |
| AMPS_CTL pulse voltage |  | 23.1 | 24 | 24.9 | V | 启动已完成，IRTN < 20mA，RMPS = 1KΩ 至 12kΩ | 8 |
| Auto MPS falling current threshold |  | 18 | 28 | 38 | mA | 启动已完成，IRTN 阈值用于产生 AMPS_CTL 脉冲 | 9 |
| MPS pulse duty cycle (Type 1-2 PSE) |  | 25.8 | 26.1 | 26.4 | % | 适用于 1-2 型 PSE | 9 |
| MPS pulse on-time (Type 1-2 PSE) |  | 76 | 81.5 | 87 | ms | 适用于 1-2 型 PSE | 9 |
| MPS pulse off-time (Type 1-2 PSE) |  | 230 |  | 250 | ms | 适用于 1-2 型 PSE | 9 |
| MPS pulse duty cycle (Type 3-4), RMPS_DUTY > 230kΩ |  | 5.2 | 5.43 | 5.6 | % | RMPS_DUTY > 230kΩ | 9 |
| MPS pulse on-time (Type 3-4), RMPS_DUTY > 230kΩ |  | 14.5 | 15 | 15.7 | ms | RMPS_DUTY > 230kΩ | 9 |
| MPS pulse duty cycle (Type 3-4), RMPS_DUTY < 8kΩ |  | 12.3 | 12.5 | 12.7 | % | RMPS_DUTY < 8kΩ | 9 |
| MPS pulse on-time (Type 3-4), RMPS_DUTY < 8kΩ |  | 36 | 37.5 | 39 | ms | RMPS_DUTY < 8kΩ | 9 |
| Thermal shutdown junction temperature (rising) | TJ | 140 | 158 |  | °C | TJ 上升 | 10 |
| Junction-to-ambient thermal resistance (TPS2373-3, RGW) | RθJA |  | 40.2 |  | °C/W |  | 6 |
| Junction-to-case (top) thermal resistance (TPS2373-3, RGW) | RθJC(top) |  | 34.6 |  | °C/W |  | 6 |
| Junction-to-board thermal resistance (TPS2373-3, RGW) | RθJB |  | 17.9 |  | °C/W |  | 6 |
| Junction-to-case (bottom) thermal resistance (TPS2373-3, RGW) | RθJC(bot) |  | 3.4 |  | °C/W |  | 6 |

## CAD (KiCad official)

- Symbol: `TPS2373-3RGWR`
- Footprint: `Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm`
- 3D model: VQFN-20(5x5) (KiCad packages3D, STEP)
- 3D model files: `tps2373-3rgwr-etched.step` / `tps2373-3rgwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2373-3rgwr.step` / `tps2373-3rgwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps2373) (46 pp, sha256 `215423c8efd715bb`, retrieved 2026-10-26, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps2373-3rgwr-datasheet.pdf)