component
TPS2372-3RGWR
Public Made by Adomby adom
Texas Instruments Power Over Ethernet (PoE) Controllers, VQFN-20(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownTPS2372-3RGWR
Texas Instruments · Power Over Ethernet (PoE) Controllers · VQFN-20(5x5)
TPS2372-3RGWR from Texas Instruments, in a VQFN-20(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VDD | power_in | Positive PoE input power rail connection; bypass to VSS with 0.1µF capacitor. |
| 2 | DEN | bidirectional | Detection and enable; connect 24.9kΩ resistor to VDD for PoE detection characteristic; pull to VSS during powered operation to disable hotswap MOSFET. |
| 3 | CLSA | output | First classification current output; connect external resistor to VSS to set classification current for IEEE 802.3bt class definition. |
| 4 | VSS | power_in | Negative power supply rail connection from PoE source. |
| 5 | VSS | power_in | Negative power supply rail connection from PoE source. |
| 6 | CLSB | output | Second classification current output; connect external resistor to VSS to set classification current for third and subsequent IEEE 802.3bt classes. |
| 7 | REF | output | Internal 1.5V voltage reference; connect 49.9kΩ ±1% resistor between REF and VSS. |
| 8 | AMPS_CTL | output | Automatic MPS control output; connect external resistor to VSS (rated for MPS current support) to set MPS pulse current amplitude; leave open to disable automatic MPS. |
| 9 | MPS_DUTY | input | MPS duty cycle selection input referenced to VSS, internally driven by precision current source (voltage limited to ~5.5V); external resistor to VSS determines duty cycle (5.4% open, 8.1% at ~60.4kΩ, or 12.5% shorted). |
| 10 | AUTCLS | input | Autoclass enable input referenced to VSS; internally pulled to 5.5V during classification; pull low to enable Autoclass during classification, otherwise leave open to minimize power consumption. |
| 11 | RTN | power_in | Drain of PoE hotswap MOSFET providing return path from load to controller; reference for RTN-based voltage measurements. |
| 12 | RTN | power_in | Drain of PoE hotswap MOSFET providing return path from load to controller; reference for RTN-based voltage measurements. |
| 13 | PG | tri_state | Power Good output, open-drain active-high referenced to RTN; pulled low during hotswap MOSFET inrush phase, high-impedance when inrush complete to enable downstream DC/DC converter startup. |
| 14 | NC | unconnected | No connection; leave unconnected. |
| 15 | NC | unconnected | No connection; leave unconnected. |
| 16 | IRSHDL_EN | input | PSE inrush delay enable input referenced to RTN, internally pulled to 5.5V internal rail; keep open to enable ~81.5ms inrush delay, connect to RTN to disable delay. |
| 17 | TPL | tri_state | PSE allocated power indicator output, binary-encoded open-drain low-level active referenced to RTN; indicates PSE power allocation class in combination with TPH and BT. |
| 18 | TPH | tri_state | PSE type indicator output, open-drain active-high referenced to RTN; indicates PSE type (1-2 or 3-4) and allocated power class in combination with TPL and BT. |
| 19 | BT | tri_state | IEEE 802.3bt PSE type indicator, open-drain low-level active output referenced to RTN; indicates PSE support for IEEE 802.3bt standard in combination with TPH and TPL. |
| 20 | NC | unconnected | No connection; keep open. |
| 21 | PAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-20(5x5) |
| Category | Power Management (PMIC) |
| Pins | 21 |
CAD (KiCad official)
- Symbol:
TPS2372-3RGWR - Footprint:
Package_DFN_QFN:QFN-20-1EP_5x5mm_P0.65mm_EP3.35x3.35mm - 3D model: VQFN-20(5x5) (KiCad packages3D, STEP)
- 3D model files:
tps2372-3rgwr-etched.step/tps2372-3rgwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2372-3rgwr.step/tps2372-3rgwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (38 pp, sha256
c83bfda2432136d5, retrieved 2026-10-06, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).