TPS2363PFBR

Texas Instruments · Supervisor And Reset ICs · TQFP-48(7x7)

TPS2363PFBR from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	FAULTA	output	Active-low open-drain fault output for slot A (filtered) that must be pulled up to AUXINA with a 100-kΩ resistor.
2	FILTERA	input	An external capacitor from this pin to ground sets the time a main or AUX fault may persist before slot A main power is turned off.
3	G12A	output	Gate drive for the 12-V P-channel FET of slot A; a capacitor from this pin to OUT12A sets the slew rate to limit inrush current.
4	GPIA1	input	Filtered general-purpose input for a mechanical switch, read through the SMBus status register, with an internal 100-kΩ pull-down; connect to ground if unused.
5	SH12A	power_in	12-V supply input and high side of the slot A 12-V sense resistor, requiring a 0.1 µF bypass capacitor to ground and Kelvin-aware layout.
6	PGOODA	output	Active-low open-drain power-good output for slot A that must be pulled up to AUXINA with a 100-kΩ resistor.
7	GPIA2	input	Filtered general-purpose input for a mechanical switch, read through the SMBus status register; available only on the TPS2363 and left unconnected if not used.
8	SL12A	input	Low side of the slot A 12-V sense resistor; an over-current condition exists when the voltage across the sense resistor exceeds the current-limit threshold, and a Kelvin connection is required.
9	FORCEONA	input	Active-low input that forces slot A on even during a fault for diagnostics, disableable via SMBus FORCEON INHIB bits, and overridden by thermal shutdown.
10	OUT12A	bidirectional	12-V channel output used to monitor slot A voltage for power good, with a 1.2-kΩ bleed-down active when main power is off and power-off readable below 100 mV via SMBus.
11	AUXINA	power_in	3.3-V auxiliary supply input for PCI Express, SMBus and internal logic that requires a 0.1 µF bypass capacitor and must be tied to 3.3 V if no AUX supply is used.
12	SH33A	power_in	3.3-V supply input and high side of the slot A 3.3-V sense resistor, requiring a 0.1 µF bypass capacitor to ground.
13	SL33A	input	Low side of the slot A 3.3-V sense resistor; an over-current condition exists when the voltage across the sense resistor exceeds the current-limit threshold, and a Kelvin connection is required.
14	G33A	output	Gate drive for the 3.3-V N-channel FET of slot A; a capacitor from this pin to ground sets the slew rate to limit inrush current.
15	VAUXA	power_out	VAUX output to slot A that is current limited to 400 mA by default, or 800 mA when the AUXHIA pin is pulled up.
16	OUT33A	bidirectional	3.3-V channel output used to monitor slot A voltage for power good, with a 1.2-kΩ bleed-down active when main power is off and power-off readable below 100 mV via SMBus.
17	GND	power_in	Ground reference pin.
18	AUXHIA	input	Selects 800 mA VAUX current for slot A when pulled up to AUXINA through a 10-kΩ maximum resistor; NC or ground selects the default 400 mA, and an internal 40-kΩ pull-down is present.
19	AUXHIB	input	Selects 800 mA VAUX current for slot B when pulled up to AUXINB through a 10-kΩ maximum resistor; NC or ground selects the default 400 mA, and an internal 40-kΩ pull-down is present.
20	RFILTER	input	A 110-kΩ resistor from this pin to ground improves fault timer accuracy for both slots.
21	OUT33B	bidirectional	3.3-V channel output used to monitor slot B voltage for power good, with a 1.2-kΩ bleed-down active when main power is off and power-off readable below 100 mV via SMBus.
22	VAUXB	power_out	VAUX output to slot B that is current limited to 400 mA by default, or 800 mA when the AUXHIB pin is pulled up.
23	G33B	output	Gate drive for the 3.3-V N-channel FET of slot B; a capacitor from this pin to ground sets the slew rate to limit inrush current.
24	SL33B	input	Low side of the slot B 3.3-V sense resistor; an over-current condition exists when the voltage across the sense resistor exceeds the current-limit threshold, and a Kelvin connection is required.
25	SH33B	power_in	3.3-V supply input and high side of the slot B 3.3-V sense resistor, requiring a 0.1 µF bypass capacitor to ground.
26	AUXINB	power_in	3.3-V auxiliary supply input for PCI Express, SMBus and internal logic that requires a 0.1 µF bypass capacitor and must be tied to 3.3 V if no AUX supply is used.
27	OUT12B	bidirectional	12-V channel output used to monitor slot B voltage for power good, with a 1.2-kΩ bleed-down active when main power is off and power-off readable below 100 mV via SMBus.
28	FORCEONB	input	Active-low input that forces slot B on even during a fault for diagnostics, disableable via SMBus FORCEON INHIB bits, and overridden by thermal shutdown.
29	SL12B	input	Low side of the slot B 12-V sense resistor; an over-current condition exists when the voltage across the sense resistor exceeds the current-limit threshold, and a Kelvin connection is required.
30	GPIB2	input	Filtered general-purpose input for a mechanical switch, read through the SMBus status register; available only on the TPS2363 and left unconnected if not used.
31	PGOODB	output	Active-low open-drain power-good output for slot B that must be pulled up to AUXINB with a 100-kΩ resistor.
32	SH12B	power_in	12-V supply input and high side of the slot B 12-V sense resistor, requiring a 0.1 µF bypass capacitor to ground.
33	GND	power_in	Ground reference pin.
34	G12B	output	Gate drive for the 12-V P-channel FET of slot B; a capacitor from this pin to OUT12B sets the slew rate to limit inrush current.
35	FILTERB	input	An external capacitor from this pin to ground sets the time a main or AUX fault may persist before slot B main power is turned off.
36	FAULTB	output	Active-low open-drain fault output for slot B (filtered) that must be pulled up to AUXINB with a 100-kΩ resistor.
37	INT	output	Active-low open-drain interrupt output asserted on a fault, which must be pulled up to 3.3 V or AUXIN through an external 10-kΩ resistor at the end of the bus.
38	GPIB1	input	Filtered general-purpose input for a mechanical switch, read through the SMBus status register, with an internal 100-kΩ pull-down; connect to ground if unused.
39	A2	input	SMBus address select input internally pulled up to 3.3 V or AUXIN through 40 kΩ, read at initialization only, and tied to ground for a zero.
40	A1	input	SMBus address select input internally pulled up to 3.3 V or AUXIN through 40 kΩ, read at initialization only, and tied to ground for a zero.
41	A0	input	SMBus address select input internally pulled up to 3.3 V or AUXIN through 40 kΩ, read at initialization only, and tied to ground for a zero.
42	AUXENB	input	Active-high, level-sensitive enable for the slot B VAUX output; taking it low clears a VAUX fault, and it should be connected to ground when using the SMBus interface.
43	ONB	input	Active-high enable for the slot B main 12-V and 3.3-V outputs; taking it low clears a main-supply fault, and it should be connected to ground when using the SMBus interface.
44	ONA	input	Active-high enable for the slot A main 12-V and 3.3-V outputs; taking it low clears a main-supply fault, and it should be connected to ground when using the SMBus interface.
45	AUXENA	input	Active-high, level-sensitive enable for the slot A VAUX output; taking it low clears a VAUX fault, and it should be connected to ground when using the SMBus interface.
46	GND	power_in	Ground reference pin.
47	SCL	input	SMBus clock input that must be pulled up to 3.3 V or AUXIN through an external 10-kΩ resistor at the end of the bus.
48	SDA	bidirectional	SMBus data input/output and address input that must be pulled up to 3.3 V or AUXIN through an external 10-kΩ resistor at the end of the bus.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	TQFP-48(7x7)
Category	Power Management (PMIC)
Pins	48

CAD (KiCad official)

Symbol: TPS2363PFBR
Footprint: Package_QFP:TQFP-48_7x7mm_P0.5mm
3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
3D model files: tps2363pfbr-etched.step / tps2363pfbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2363pfbr.step / tps2363pfbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (47 pp, sha256 0022f32de279ab1d, retrieved 2026-10-11, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TPS2363PFBR

**Texas Instruments** · Supervisor And Reset ICs · TQFP-48(7x7)

TPS2363PFBR from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | FAULTA | output | Active-low open-drain fault output for slot A (filtered) that must be pulled up to AUXINA with a 100-kΩ resistor. |
| 2 | FILTERA | input | An external capacitor from this pin to ground sets the time a main or AUX fault may persist before slot A main power is turned off. |
| 3 | G12A | output | Gate drive for the 12-V P-channel FET of slot A; a capacitor from this pin to OUT12A sets the slew rate to limit inrush current. |
| 4 | GPIA1 | input | Filtered general-purpose input for a mechanical switch, read through the SMBus status register, with an internal 100-kΩ pull-down; connect to ground if unused. |
| 5 | SH12A | power_in | 12-V supply input and high side of the slot A 12-V sense resistor, requiring a 0.1 µF bypass capacitor to ground and Kelvin-aware layout. |
| 6 | PGOODA | output | Active-low open-drain power-good output for slot A that must be pulled up to AUXINA with a 100-kΩ resistor. |
| 7 | GPIA2 | input | Filtered general-purpose input for a mechanical switch, read through the SMBus status register; available only on the TPS2363 and left unconnected if not used. |
| 8 | SL12A | input | Low side of the slot A 12-V sense resistor; an over-current condition exists when the voltage across the sense resistor exceeds the current-limit threshold, and a Kelvin connection is required. |
| 9 | FORCEONA | input | Active-low input that forces slot A on even during a fault for diagnostics, disableable via SMBus FORCEON INHIB bits, and overridden by thermal shutdown. |
| 10 | OUT12A | bidirectional | 12-V channel output used to monitor slot A voltage for power good, with a 1.2-kΩ bleed-down active when main power is off and power-off readable below 100 mV via SMBus. |
| 11 | AUXINA | power_in | 3.3-V auxiliary supply input for PCI Express, SMBus and internal logic that requires a 0.1 µF bypass capacitor and must be tied to 3.3 V if no AUX supply is used. |
| 12 | SH33A | power_in | 3.3-V supply input and high side of the slot A 3.3-V sense resistor, requiring a 0.1 µF bypass capacitor to ground. |
| 13 | SL33A | input | Low side of the slot A 3.3-V sense resistor; an over-current condition exists when the voltage across the sense resistor exceeds the current-limit threshold, and a Kelvin connection is required. |
| 14 | G33A | output | Gate drive for the 3.3-V N-channel FET of slot A; a capacitor from this pin to ground sets the slew rate to limit inrush current. |
| 15 | VAUXA | power_out | VAUX output to slot A that is current limited to 400 mA by default, or 800 mA when the AUXHIA pin is pulled up. |
| 16 | OUT33A | bidirectional | 3.3-V channel output used to monitor slot A voltage for power good, with a 1.2-kΩ bleed-down active when main power is off and power-off readable below 100 mV via SMBus. |
| 17 | GND | power_in | Ground reference pin. |
| 18 | AUXHIA | input | Selects 800 mA VAUX current for slot A when pulled up to AUXINA through a 10-kΩ maximum resistor; NC or ground selects the default 400 mA, and an internal 40-kΩ pull-down is present. |
| 19 | AUXHIB | input | Selects 800 mA VAUX current for slot B when pulled up to AUXINB through a 10-kΩ maximum resistor; NC or ground selects the default 400 mA, and an internal 40-kΩ pull-down is present. |
| 20 | RFILTER | input | A 110-kΩ resistor from this pin to ground improves fault timer accuracy for both slots. |
| 21 | OUT33B | bidirectional | 3.3-V channel output used to monitor slot B voltage for power good, with a 1.2-kΩ bleed-down active when main power is off and power-off readable below 100 mV via SMBus. |
| 22 | VAUXB | power_out | VAUX output to slot B that is current limited to 400 mA by default, or 800 mA when the AUXHIB pin is pulled up. |
| 23 | G33B | output | Gate drive for the 3.3-V N-channel FET of slot B; a capacitor from this pin to ground sets the slew rate to limit inrush current. |
| 24 | SL33B | input | Low side of the slot B 3.3-V sense resistor; an over-current condition exists when the voltage across the sense resistor exceeds the current-limit threshold, and a Kelvin connection is required. |
| 25 | SH33B | power_in | 3.3-V supply input and high side of the slot B 3.3-V sense resistor, requiring a 0.1 µF bypass capacitor to ground. |
| 26 | AUXINB | power_in | 3.3-V auxiliary supply input for PCI Express, SMBus and internal logic that requires a 0.1 µF bypass capacitor and must be tied to 3.3 V if no AUX supply is used. |
| 27 | OUT12B | bidirectional | 12-V channel output used to monitor slot B voltage for power good, with a 1.2-kΩ bleed-down active when main power is off and power-off readable below 100 mV via SMBus. |
| 28 | FORCEONB | input | Active-low input that forces slot B on even during a fault for diagnostics, disableable via SMBus FORCEON INHIB bits, and overridden by thermal shutdown. |
| 29 | SL12B | input | Low side of the slot B 12-V sense resistor; an over-current condition exists when the voltage across the sense resistor exceeds the current-limit threshold, and a Kelvin connection is required. |
| 30 | GPIB2 | input | Filtered general-purpose input for a mechanical switch, read through the SMBus status register; available only on the TPS2363 and left unconnected if not used. |
| 31 | PGOODB | output | Active-low open-drain power-good output for slot B that must be pulled up to AUXINB with a 100-kΩ resistor. |
| 32 | SH12B | power_in | 12-V supply input and high side of the slot B 12-V sense resistor, requiring a 0.1 µF bypass capacitor to ground. |
| 33 | GND | power_in | Ground reference pin. |
| 34 | G12B | output | Gate drive for the 12-V P-channel FET of slot B; a capacitor from this pin to OUT12B sets the slew rate to limit inrush current. |
| 35 | FILTERB | input | An external capacitor from this pin to ground sets the time a main or AUX fault may persist before slot B main power is turned off. |
| 36 | FAULTB | output | Active-low open-drain fault output for slot B (filtered) that must be pulled up to AUXINB with a 100-kΩ resistor. |
| 37 | INT | output | Active-low open-drain interrupt output asserted on a fault, which must be pulled up to 3.3 V or AUXIN through an external 10-kΩ resistor at the end of the bus. |
| 38 | GPIB1 | input | Filtered general-purpose input for a mechanical switch, read through the SMBus status register, with an internal 100-kΩ pull-down; connect to ground if unused. |
| 39 | A2 | input | SMBus address select input internally pulled up to 3.3 V or AUXIN through 40 kΩ, read at initialization only, and tied to ground for a zero. |
| 40 | A1 | input | SMBus address select input internally pulled up to 3.3 V or AUXIN through 40 kΩ, read at initialization only, and tied to ground for a zero. |
| 41 | A0 | input | SMBus address select input internally pulled up to 3.3 V or AUXIN through 40 kΩ, read at initialization only, and tied to ground for a zero. |
| 42 | AUXENB | input | Active-high, level-sensitive enable for the slot B VAUX output; taking it low clears a VAUX fault, and it should be connected to ground when using the SMBus interface. |
| 43 | ONB | input | Active-high enable for the slot B main 12-V and 3.3-V outputs; taking it low clears a main-supply fault, and it should be connected to ground when using the SMBus interface. |
| 44 | ONA | input | Active-high enable for the slot A main 12-V and 3.3-V outputs; taking it low clears a main-supply fault, and it should be connected to ground when using the SMBus interface. |
| 45 | AUXENA | input | Active-high, level-sensitive enable for the slot A VAUX output; taking it low clears a VAUX fault, and it should be connected to ground when using the SMBus interface. |
| 46 | GND | power_in | Ground reference pin. |
| 47 | SCL | input | SMBus clock input that must be pulled up to 3.3 V or AUXIN through an external 10-kΩ resistor at the end of the bus. |
| 48 | SDA | bidirectional | SMBus data input/output and address input that must be pulled up to 3.3 V or AUXIN through an external 10-kΩ resistor at the end of the bus. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TQFP-48(7x7) |
| Category | Power Management (PMIC) |
| Pins | 48 |

## CAD (KiCad official)

- Symbol: `TPS2363PFBR`
- Footprint: `Package_QFP:TQFP-48_7x7mm_P0.5mm`
- 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `tps2363pfbr-etched.step` / `tps2363pfbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2363pfbr.step` / `tps2363pfbr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps2363) (47 pp, sha256 `0022f32de279ab1d`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps2363pfbr-datasheet.pdf)