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TPS2350PWR
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Texas Instruments Supervisor And Reset ICs, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# TPS2350PWR++**Texas Instruments** · Supervisor And Reset ICs · TSSOP-14++TPS2350PWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | RTN | power_in | Supply return (ground) for the device; for negative-voltage systems it connects directly to the return node of the input power bus, and all voltages are referenced to the more negative of -VINA and -VINB. |+| 2 | FLT | output | Open-drain, active-low fault indication that sinks 10 mA when in fault, withstands 80 V without leakage when not faulted, and withstands transients to 100 V when limited by a series resistor of at least 10 kΩ. |+| 3 | UV | input | Under-voltage comparator input, typically a divider from RTN to SOURCE, which must be more than 1.4 V above SOURCE (with no fault and OV low) to enable the linear current amplifier. |+| 4 | OV | input | Over-voltage comparator input, typically a divider from RTN to SOURCE, which must be less than 1.4 V above SOURCE (with UV high and no fault) to enable the linear current amplifier. |+| 5 | FLTTIM | bidirectional | Fault timer pin where an external capacitor from FLTTIM to SOURCE sets the fault timeout; the capacitor is charged to the 4-V fault threshold and then discharged at about 1% of the charge rate to set the retry duty cycle. |+| 6 | RAMP | bidirectional | Inrush slew-rate programming pin where an external capacitor from RAMP to SOURCE sets turn-on current slew rate; when fully charged RAMP may exceed SOURCE by 6 V, with the reference clamped to 42 mV. |+| 7 | SOURCE | bidirectional | Negative current sense input and common connection to the supply-selector FET sources, which the supply select comparator ties to the more negative of -VINA and -VINB, and to the negative terminal of the sense resistor. |+| 8 | GATB | output | Gate drive for the external N-channel FET that selects -VINB; it is pulled 14 V above -VINB when -VINB is more negative than -VINA and pulled down to -VINA when it is not. |+| 9 | GATA | output | Gate drive for the external N-channel FET that selects -VINA; it is pulled 14 V above -VINA when -VINA is more negative than -VINB and pulled down to -VINB when it is not. |+| 10 | SENSE | input | Positive current sense input, where the linear current amplifier regulates SENSE to 42 mV during ramp-up and a fast overload above 120 mV pulls GAT low, bypassing the fault timer. |+| 11 | GAT | output | Gate drive for the external N-channel protection MOSFET that ramps load current and disconnects on a fault; when fully enhanced the LCA drives GAT 14 V above SOURCE. |+| 12 | PG | output | Open-drain, active-high power-good indication that the power FET is fully enhanced and load current is below the commanded level; it withstands 80 V without leakage when power is not good and sinks 10 mA when in fault. |+| 13 | -VINB | power_in | Negative supply input B that connects directly to the second input supply negative rail; the recommended input supply range is -12 V to -80 V with respect to RTN. |+| 14 | -VINA | power_in | Negative supply input A that connects directly to the first input supply negative rail; the recommended input supply range is -12 V to -80 V with respect to RTN. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-14 |+| Category | Power Management (PMIC) |+| Pins | 14 |++## CAD (KiCad official)++- Symbol: `TPS2350PWR`+- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`+- 3D model: TSSOP-14 (KiCad packages3D, STEP)+- 3D model files: `tps2350pwr-etched.step` / `tps2350pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2350pwr.step` / `tps2350pwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps2350.pdf) (30 pp, sha256 `99780b23bedb684a`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/tps2350pwr-datasheet.pdf)
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for negative-voltage systems it connects directly to the return node of the input power bus, and all voltages are referenced to the more negative of -VINA and -VINB."+ },+ {+ "number": "2",+ "name": "FLT",+ "type": "output",+ "description": "Open-drain, active-low fault indication that sinks 10 mA when in fault, withstands 80 V without leakage when not faulted, and withstands transients to 100 V when limited by a series resistor of at least 10 kΩ."+ },+ {+ "number": "3",+ "name": "UV",+ "type": "input",+ "description": "Under-voltage comparator input, typically a divider from RTN to SOURCE, which must be more than 1.4 V above SOURCE (with no fault and OV low) to enable the linear current amplifier."+ },+ {+ "number": "4",+ "name": "OV",+ "type": "input",+ "description": "Over-voltage comparator input, typically a divider from RTN to SOURCE, which must be less than 1.4 V above SOURCE (with UV high and no fault) to enable the linear current amplifier."+ },+ {+ "number": "5",+ "name": "FLTTIM",+ "type": "bidirectional",+ "description": "Fault timer pin where an external capacitor from FLTTIM to SOURCE sets the fault timeout; the capacitor is charged to the 4-V fault threshold and then discharged at about 1% of the charge rate to set the retry duty cycle."+ },+ {+ "number": "6",+ "name": "RAMP",+ "type": "bidirectional",+ "description": "Inrush slew-rate programming pin where an external capacitor from RAMP to SOURCE sets turn-on current slew rate; when fully charged RAMP may exceed SOURCE by 6 V, with the reference clamped to 42 mV."+ },+ {+ "number": "7",+ "name": "SOURCE",+ "type": "bidirectional",+ "description": "Negative current sense input and common connection to the supply-selector FET sources, which the supply select comparator ties to the more negative of -VINA and -VINB, and to the negative terminal of the sense resistor."+ },+ {+ "number": "8",+ "name": "GATB",+ "type": "output",+ "description": "Gate drive for the external N-channel FET that selects -VINB; it is pulled 14 V above -VINB when -VINB is more negative than -VINA and pulled down to -VINA when it is not."+ },+ {+ "number": "9",+ "name": "GATA",+ "type": "output",+ "description": "Gate drive for the external N-channel FET that selects -VINA; it is pulled 14 V above -VINA when -VINA is more negative than -VINB and pulled down to -VINB when it is not."+ },+ {+ "number": "10",+ "name": "SENSE",+ "type": "input",+ "description": "Positive current sense input, where the linear current amplifier regulates SENSE to 42 mV during ramp-up and a fast overload above 120 mV pulls GAT low, bypassing the fault timer."+ },+ {+ "number": "11",+ "name": "GAT",+ "type": "output",+ "description": "Gate drive for the external N-channel protection MOSFET that ramps load current and disconnects on a fault; when fully enhanced the LCA drives GAT 14 V above SOURCE."+ },+ {+ "number": "12",+ "name": "PG",+ "type": "output",+ "description": "Open-drain, active-high power-good indication that the power FET is fully enhanced and load current is below the commanded level; it withstands 80 V without leakage when power is not good and sinks 10 mA when in fault."+ },+ {+ "number": "13",+ "name": "–VINB",+ "type": "power_in",+ "description": "Negative supply input B that connects directly to the second input supply negative rail; the recommended input supply range is -12 V to -80 V with respect to RTN."+ },+ {+ "number": "14",+ "name": "–VINA",+ "type": "power_in",+ "description": "Negative supply input A that connects directly to the first input supply negative rail; the recommended input supply range is -12 V to -80 V with respect to RTN."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The pin table lists RTN as type I with description 'Supply return (ground)', while the PIN DESCRIPTI; The pin table lists -VINA and -VINB as type I (input). Typed as power_in because they are the negati; The pinout figure 'SOIC/TSSOP-14 PACKAGE (TOP VIEW)' is shared by the D (SOIC) and PW (TSSOP) packag"+ ],+ "pages_sent": 9,+ "cost_usd": 0.068,+ "at": "2026-10-08T20:03:55"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/tps2350.pdf",+ "pages": 30,+ "sha256": "99780b23bedb684a",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 14,+ "described": 14,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "tps2350pwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "tps2350pwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.4,+ 5,+ 1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "1303f5a5106abd25c870bc7ceaddacf8b2a78ea877b24ebfa772f9fba780013b",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}