# TPS2331IPWR

**Texas Instruments** · Supervisor And Reset ICs · TSSOP-14

TPS2331IPWR from Texas Instruments, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE | output | Connects to the gate of the external N-channel high-side MOSFET; the charge pump sources about 15 μA and generates 9 V-12 V gate-to-source across the MOSFET. |
| 2 | DGND | power_in | Digital ground for the device. |
| 3 | TIMER | output | A capacitor on TIMER sets how long the power switch may stay in overcurrent before latching off, and a minimum 50-pF capacitor to ground is strongly recommended in high-power or high-temperature applications to prevent false triggering. |
| 4 | VREG | output | Output of the internal low-dropout regulator, less than 5.5 V, which requires a 0.1-μF ceramic bypass capacitor to ground for noise rejection and stable operation. |
| 5 | VSENSE | input | Power-good sense input that pulls PWRGD low when the voltage sensed is below the reference of approximately 1.23 V. |
| 6 | AGND | power_in | Analog ground, to be connected to DGND as close as possible. |
| 7 | ISENSE | input | Current-sense input connected to the MOSFET drain; an overcurrent condition is assumed when ISENSE is pulled below ISET, and ISENSE and ISET must never exceed VI(IN). |
| 8 | IN | power_in | Input supply that powers the device and should be connected to the power source driving the external MOSFET; the device supports 3-V, 5-V, or 12-V operation within a 3 V to 13 V input range. |
| 9 | AGND | power_in | Analog ground, to be connected to DGND as close as possible. |
| 10 | ISET | input | Sets the circuit-breaker threshold through an external resistor connected to IN, with an internal 50-μA current source drawn from this pin and VI(ISET) never exceeding VI(IN). |
| 11 | FAULT | output | Open-drain overcurrent fault flag that goes low and latches the device off when TIMER reaches 0.5 V; the device restarts only after ENABLE is toggled or input power is cycled. |
| 12 | PWRGD | output | Open-drain power-good output that is pulled low when VSENSE is below about 1.23 V, with a 20-μs deglitch filter and pulled up to its pull-up rail in disable mode. |
| 13 | ENABLE | input | Active-high enable input on the TPS2331 (active-low on the TPS2330); pulling it to the disabled state for more than 50 μs discharges the gate at a controlled rate and enables the output discharge transistor. |
| 14 | DISCH | output | Connects to the source of the external N-channel MOSFET to discharge the load when the MOSFET is disabled, and also serves as the reference for the internal gate-voltage clamp. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-14 |
| Category | Power Management (PMIC) |
| Pins | 14 |

## CAD (KiCad official)

- Symbol: `TPS2331IPWR`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `tps2331ipwr-etched.step` / `tps2331ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2331ipwr.step` / `tps2331ipwr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps2330) (29 pp, sha256 `d6a67c69fef8f4da`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps2331ipwr-datasheet.pdf)