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TPS2321IPWR

Public Made by Adom

by adom

Texas Instruments Supervisor And Reset ICs, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management (pmic)tps2321ipwrfactory-2.0.0extractor-text
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TPS2321IPWR

Texas Instruments · Supervisor And Reset ICs · TSSOP-16

TPS2321IPWR from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GATE1 output Connects to the gate of the channel 1 high-side N-channel MOSFET; the charge pump sources approximately 15 µA to it and generates 9 V to 12 V gate-to-source across the external MOSFET.
2 GATE2 output Connects to the gate of the channel 2 high-side N-channel MOSFET; the charge pump sources approximately 15 µA to it and generates 9 V to 12 V gate-to-source across the external MOSFET.
3 DGND power_in Digital ground.
4 TIMER output A capacitor on this pin sets the circuit-breaker deglitch time; the latch sets when TIMER reaches approximately 0.5 V, and a minimum 50 pF capacitor to ground is strongly recommended in high-power or high-temperature applications.
5 VREG power_out Output of the internal low-dropout regulator (input IN1), less than 5.5 V, for the device; a 0.1 µF ceramic bypass capacitor to ground is recommended.
6 AGND power_in Analog ground, to be connected to DGND as close as possible.
7 ISENSE2 input Channel 2 current-sense input; an overcurrent is assumed if it is pulled below ISET2, and VI(ISENSE2) must never exceed VI(IN2).
8 ISENSE1 input Channel 1 current-sense input; an overcurrent is assumed if it is pulled below ISET1, and VI(ISENSE1) must never exceed VI(IN1).
9 IN1 input Input voltage for channel 1 that also supplies the device operating current; the IN1 channel supports 3 V to 13 V operation.
10 IN2 input Input voltage for channel 2; the IN2 channel supports 3 V to 5.5 V operation.
11 ISET2 input Sets the channel 2 circuit-breaker threshold through an external resistor connected to IN2; an internal source draws 50 µA from this pin.
12 ISET1 input Sets the channel 1 circuit-breaker threshold through an external resistor connected to IN1; an internal source draws 50 µA from this pin.
13 FAULT output Open-drain overcurrent fault flag output that is pulled low when an overcurrent condition latches a channel off.
14 ENABLE input Active-high enable input on TPS2321 (active-low on TPS2320); when pulled low for more than 50 µs the gate is discharged at a controlled rate and the output bulk capacitance is discharged.
15 DISCH2 output Discharge transistor for channel 2, connected to the source of the channel 2 external MOSFET; it discharges the load when the MOSFET is disabled and serves as the reference for the gate clamp.
16 DISCH1 output Discharge transistor for channel 1, connected to the source of the channel 1 external MOSFET; it discharges the load when the MOSFET is disabled and serves as the reference for the gate clamp.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-16
Category Power Management (PMIC)
Pins 16

CAD (KiCad official)

  • Symbol: TPS2321IPWR
  • Footprint: Package_SO:TSSOP-16_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16 (KiCad packages3D, STEP)
  • 3D model files: tps2321ipwr-etched.step / tps2321ipwr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2321ipwr.step / tps2321ipwr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (29 pp, sha256 0c4eed4165426632, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF