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TPS2301IPWR
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Texas Instruments Surge Protection Devices (SPDs), TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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TPS2301IPWR
Texas Instruments · Surge Protection Devices (SPDs) · TSSOP-20
TPS2301IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE1 | output | Connects to the gate of the channel 1 high-side external N-channel MOSFET; the internal charge pump sources approximately 15 µA to pull it up and generates 9 V-12 V gate-to-source. |
| 2 | GATE2 | output | Connects to the gate of the channel 2 high-side external N-channel MOSFET; the internal charge pump sources approximately 15 µA to pull it up and generates 9 V-12 V gate-to-source. |
| 3 | DGND | power_in | Digital ground; all device voltages are referenced to DGND. |
| 4 | TIMER | output | Sets the circuit-breaker deglitch time through a capacitor to ground (minimum 50 pF recommended); the circuit-breaker latches off when TIMER reaches approximately 0.5 V. |
| 5 | VREG | output | Output of the internal low-dropout regulator (input IN1), less than 5.5 V, that requires a 0.1-µF ceramic capacitor to ground for noise rejection. |
| 6 | VSENSE2 | input | Power-good sense input for channel 2; a voltage below approximately 1.23 V pulls PWRGD2 low. |
| 7 | VSENSE1 | input | Power-good sense input for channel 1; a voltage below approximately 1.23 V pulls PWRGD1 low. |
| 8 | AGND | power_in | Analog ground, connected to DGND as close as possible. |
| 9 | ISENSE2 | input | Channel 2 current-sense input; an overcurrent is assumed if ISENSE2 is pulled below ISET2, and it should never exceed VI(IN2). |
| 10 | ISENSE1 | input | Channel 1 current-sense input; an overcurrent is assumed if ISENSE1 is pulled below ISET1, and it should never exceed VI(IN1). |
| 11 | IN1 | input | Input voltage for channel 1 that also supplies the device operating current; channel 1 supports 3-V, 5-V, or 12-V operation. |
| 12 | IN2 | input | Input voltage for channel 2, which supports 3-V or 5-V operation. |
| 13 | PWRGD2 | output | Open-drain output asserted low when VSENSE2 is below the reference (about 1.23 V); it is pulled up to its pullup rail in disable mode. |
| 14 | ISET2 | input | Sets the channel 2 circuit-breaker threshold through an external resistor to IN2; an internal 50-µA current source draws from this pin. |
| 15 | ISET1 | input | Sets the channel 1 circuit-breaker threshold through an external resistor to IN1; an internal 50-µA current source draws from this pin. |
| 16 | FAULT | output | Open-drain overcurrent fault output that is pulled low when a sustained overcurrent latches off a channel. |
| 17 | PWRGD1 | output | Open-drain output asserted low when VSENSE1 is below the reference (about 1.23 V); it is pulled up to its pullup rail in disable mode. |
| 18 | ENABLE | input | Active-high enable input on the TPS2301 (CMOS- and TTL-compatible); pulling it low for more than 50 µs discharges the MOSFET gates and output bulk capacitance. |
| 19 | DISCH2 | output | Discharge transistor for channel 2; connects to the source of the channel 2 external MOSFET and serves as the gate-clamp reference. |
| 20 | DISCH1 | output | Discharge transistor for channel 1; connects to the source of the channel 1 external MOSFET and serves as the gate-clamp reference. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Circuit Protection |
| Pins | 20 |
CAD (KiCad official)
- Symbol:
TPS2301IPWR - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
tps2301ipwr-etched.step/tps2301ipwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2301ipwr.step/tps2301ipwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (29 pp, sha256
8360d0297aba9fa0, retrieved 2026-10-11, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# TPS2301IPWR
**Texas Instruments** · Surge Protection Devices (SPDs) · TSSOP-20
TPS2301IPWR from Texas Instruments, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE1 | output | Connects to the gate of the channel 1 high-side external N-channel MOSFET; the internal charge pump sources approximately 15 µA to pull it up and generates 9 V-12 V gate-to-source. |
| 2 | GATE2 | output | Connects to the gate of the channel 2 high-side external N-channel MOSFET; the internal charge pump sources approximately 15 µA to pull it up and generates 9 V-12 V gate-to-source. |
| 3 | DGND | power_in | Digital ground; all device voltages are referenced to DGND. |
| 4 | TIMER | output | Sets the circuit-breaker deglitch time through a capacitor to ground (minimum 50 pF recommended); the circuit-breaker latches off when TIMER reaches approximately 0.5 V. |
| 5 | VREG | output | Output of the internal low-dropout regulator (input IN1), less than 5.5 V, that requires a 0.1-µF ceramic capacitor to ground for noise rejection. |
| 6 | VSENSE2 | input | Power-good sense input for channel 2; a voltage below approximately 1.23 V pulls PWRGD2 low. |
| 7 | VSENSE1 | input | Power-good sense input for channel 1; a voltage below approximately 1.23 V pulls PWRGD1 low. |
| 8 | AGND | power_in | Analog ground, connected to DGND as close as possible. |
| 9 | ISENSE2 | input | Channel 2 current-sense input; an overcurrent is assumed if ISENSE2 is pulled below ISET2, and it should never exceed VI(IN2). |
| 10 | ISENSE1 | input | Channel 1 current-sense input; an overcurrent is assumed if ISENSE1 is pulled below ISET1, and it should never exceed VI(IN1). |
| 11 | IN1 | input | Input voltage for channel 1 that also supplies the device operating current; channel 1 supports 3-V, 5-V, or 12-V operation. |
| 12 | IN2 | input | Input voltage for channel 2, which supports 3-V or 5-V operation. |
| 13 | PWRGD2 | output | Open-drain output asserted low when VSENSE2 is below the reference (about 1.23 V); it is pulled up to its pullup rail in disable mode. |
| 14 | ISET2 | input | Sets the channel 2 circuit-breaker threshold through an external resistor to IN2; an internal 50-µA current source draws from this pin. |
| 15 | ISET1 | input | Sets the channel 1 circuit-breaker threshold through an external resistor to IN1; an internal 50-µA current source draws from this pin. |
| 16 | FAULT | output | Open-drain overcurrent fault output that is pulled low when a sustained overcurrent latches off a channel. |
| 17 | PWRGD1 | output | Open-drain output asserted low when VSENSE1 is below the reference (about 1.23 V); it is pulled up to its pullup rail in disable mode. |
| 18 | ENABLE | input | Active-high enable input on the TPS2301 (CMOS- and TTL-compatible); pulling it low for more than 50 µs discharges the MOSFET gates and output bulk capacitance. |
| 19 | DISCH2 | output | Discharge transistor for channel 2; connects to the source of the channel 2 external MOSFET and serves as the gate-clamp reference. |
| 20 | DISCH1 | output | Discharge transistor for channel 1; connects to the source of the channel 1 external MOSFET and serves as the gate-clamp reference. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-20 |
| Category | Circuit Protection |
| Pins | 20 |
## CAD (KiCad official)
- Symbol: `TPS2301IPWR`
- Footprint: `Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm`
- 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files: `tps2301ipwr-etched.step` / `tps2301ipwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2301ipwr.step` / `tps2301ipwr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps2301) (29 pp, sha256 `8360d0297aba9fa0`, retrieved 2026-10-11, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/tps2301ipwr-datasheet.pdf)