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Contents

README

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TPS22981RGPR

Texas Instruments · Power Distribution Switches · QFN-20(4x4)

TPS22981RGPR from Texas Instruments, in a QFN-20(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Device ground; all GND pins must be connected to board ground.
2 GND power_in Device ground; all GND pins must be connected to board ground.
3 GND power_in Device ground; all GND pins must be connected to board ground.
4 FAULTZ output Open-drain fault output that pulls low during a fault condition; connect a pull-up resistor (RFAULTZ, at least 30 kΩ, 100 kΩ recommended) to V3P3, or float or tie to GND if unused.
5 EN input Device active-high enable; when low, OUT is open.
6 VHV power_in High-voltage power supply input, 4.5 V to 19.8 V; minimize inductance at this pin to avoid inductive voltage bounce at short circuit.
7 VHV power_in High-voltage power supply input, 4.5 V to 19.8 V; minimize inductance at this pin to avoid inductive voltage bounce at short circuit.
8 ISET_V3P3 passive Sets the V3P3 current limit; place a resistor (RSET_V3P3, 26.7 kΩ to 402 kΩ) between this pin and GND.
9 ISET_S3 passive Sets the VHV current limit in S3 mode; place a resistor (RSET_S3, 26.7 kΩ to 402 kΩ) between this pin and GND.
10 ISET_S0 passive Sets the VHV current limit in S0 mode; place a resistor (RSET_S0, 26.7 kΩ to 402 kΩ) between this pin and GND.
11 HV_EN input Active-high VHV output enable, controlling the VHV switch.
12 OUT power_out Power output; place a minimum of 1 µF capacitor as close to this pin as possible.
13 GND power_in Device ground; all GND pins must be connected to board ground.
14 OUT power_out Power output; place a minimum of 1 µF capacitor as close to this pin as possible.
15 GND power_in Device ground; all GND pins must be connected to board ground.
16 ENHVU input When high, device enable also requires VHV UVLO to be cleared (both V3P3 and VHV present); when low, only V3P3 must be present.
17 S0 input When asserted high, the device operates in S0 mode (RSET_S0 sets the VHV limit); otherwise it operates in S3 mode.
18 V3P3OUT power_out 3.3 V bypass output; place a minimum of 0.1 µF capacitor as close to this pin as possible.
19 V3P3 power_in 3.3 V power supply input (3 V to 3.6 V); place a minimum of 0.1 µF capacitor as close to this pin as possible.
20 V3P3 power_in 3.3 V power supply input (3 V to 3.6 V); place a minimum of 0.1 µF capacitor as close to this pin as possible.
21 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package QFN-20(4x4)
Category Power Management (PMIC)
Pins 21

CAD (KiCad official)

  • Symbol: TPS22981RGPR
  • Footprint: Package_DFN_QFN:QFN-20-1EP_4x4mm_P0.5mm_EP2.5x2.5mm
  • 3D model: QFN-20(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps22981rgpr-etched.step / tps22981rgpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps22981rgpr.step / tps22981rgpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (21 pp, sha256 58c94a210202c417, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF