main
Download ZIP Propose a change
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 29d ago
viewers tps2141ipwp: viewers · Ray 29d ago
package.json Publish 0.1.0 · Ray 29d ago
page.json Set visibility: public · Ray 29d ago
README.md Publish 0.1.0 · Ray 29d ago
tps2141ipwp-etched.glb tps2141ipwp: factory component page (tier=lcsc) · Ray 29d ago
tps2141ipwp-etched.step tps2141ipwp: factory component page (tier=lcsc) · Ray 29d ago
tps2141ipwp-hero.glb tps2141ipwp: hero GLB from the etched model (keeps the MPN mark) · Ray 29d ago
tps2141ipwp-hero.overlay.json Publish 0.1.0 · Ray 29d ago
tps2141ipwp.glb Publish 0.1.0 · Ray 29d ago
tps2141ipwp.kicad_mod Publish 0.1.0 · Ray 29d ago
tps2141ipwp.kicad_sym Publish 0.1.0 · Ray 29d ago
tps2141ipwp.lbr Publish 0.1.0 · Ray 29d ago
tps2141ipwp.step Publish 0.1.0 · Ray 29d ago

TPS2141IPWP

Texas Instruments · Power Distribution Switches · TSSOP-14-EP

TPS2141IPWP from Texas Instruments, in a TSSOP-14-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 SW_PG output Power good output for the switch, active high logic-level with no external pullup required, pulled low when SW_OUT falls below 88% of 5 V for TPS2141.
2 SW_IN input Input of the integrated N-channel high-side switch, with maximum on-state resistance of 65 mΩ and a continuous rating of 500 mA.
3 SW_IN input Input of the integrated N-channel high-side switch (pin 3 is internally tied to pin 2), with maximum on-state resistance of 65 mΩ and a continuous rating of 500 mA.
4 LDO_IN input Input of the internal adjustable LDO, with a dropout voltage of 0.5 V maximum and a continuous current rating of 250 mA.
5 SW_EN input Active-low enable for the switch on TPS2141 devices, with an internal pullup (pin is active high on TPS2150/51).
6 LDO_EN input Active-high enable for the LDO regulator, with no internal pullup or pulldown.
7 GND power_in Ground reference for the device.
8 LDO_PG output Power good signal for the LDO output, open-drain and active high.
9 ADJ input Feedback adjustment input of the LDO regulator used to set the output voltage, adjustable from 0.9 V to 3.3 V.
10 LDO_PLDN input Output pulldown pin for the LDO, used when connected to LDO_OUT.
11 LDO_OUT output Output of the adjustable LDO regulator, rated for 250 mA continuous current.
12 SW_OUT output Output of the internal power-distribution switch.
13 SW_OUT output Output of the internal power-distribution switch (pin 13 is internally tied to pin 12).
14 SW_PLDN input Output pulldown pin for the switch, used when connected to SW_OUT to speed up output fall time.
15 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package TSSOP-14-EP
Category Power Management (PMIC)
Pins 15

CAD (KiCad official)

  • Symbol: TPS2141IPWP
  • Footprint: Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14-EP (KiCad packages3D, STEP)
  • 3D model files: tps2141ipwp-etched.step / tps2141ipwp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2141ipwp.step / tps2141ipwp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (33 pp, sha256 8316b929dcdd03f1, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF