component
TPS2111APWR
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads on click. Unloads only if this page sits in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads on click. Unloads only if this page sits in the background.
PCB Footprint
Open full view ↗Loads on click. Unloads only if this page sits in the background.
Datasheet
Open in new tab ↗Loads on click. Unloads only if this page sits in the background.
README
markdownTPS2111APWR
Texas Instruments · Power Distribution Switches · TSSOP-8
TPS2111APWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | D0 | input | TTL- and CMOS-compatible digital input with 1-mA pull-up used with D1 to select multiplexer mode and switching behavior per Truth Table. |
| 2 | D1 | input | TTL- and CMOS-compatible digital input with 1-mA pull-up used with D0 to select multiplexer mode and switching behavior per Truth Table. |
| 3 | VSNS | input | Analog voltage sense input that in auto-switching mode (D0=1, D1=0) connects OUT to IN1 if VSNS > 0.8 V, otherwise to the higher of IN1 and IN2. |
| 4 | ILIM | input | Current limit programming input where resistor RILIM from ILIM to GND sets current limit to 250/RILIM A (TPS2110A) or 500/RILIM A (TPS2111A). |
| 5 | GND | power_in | Power supply ground reference. |
| 6 | IN2 | power_in | Secondary power supply input rated 2.8 V to 5.5 V; switch enabled only when supply above UVLO threshold and internal VDD UVLO satisfied. |
| 7 | OUT | power_out | Power switch output that connects to either IN1 or IN2 based on control logic; rated for up to 1.5 A continuous for TPS2111A. |
| 8 | IN1 | power_in | Primary power supply input rated 2.8 V to 5.5 V; switch enabled only when supply above UVLO threshold and internal VDD UVLO satisfied. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | TSSOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS2111APWR - Footprint:
Package_SO:TSSOP-8_3x3mm_P0.65mm - 3D model: TSSOP-8 (KiCad packages3D, STEP)
- 3D model files:
tps2111apwr-etched.step/tps2111apwr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2111apwr.step/tps2111apwr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (27 pp, sha256
e73966128dfca53e, retrieved 2026-10-03, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).