TPS2090DR

Texas Instruments · Power Distribution Switches · SOIC-8

TPS2090DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	GND	power_in	Ground reference for the device; all voltages are specified with respect to GND.
2	IN1	input	N-channel MOSFET drain of switch 1 (power input); the device operates from 2.7 V to 5.5 V and a 0.01 µF to 0.1 µF ceramic bypass to GND is recommended close to the device.
3	IN2	input	N-channel MOSFET drain of switch 2 (power input); the device operates from 2.7 V to 5.5 V and a 0.01 µF to 0.1 µF ceramic bypass to GND is recommended close to the device.
4	EN1	input	Enable input for switch 1 that is active high on the TPS2090 and turns on the power switch; input range is 0 V to 5.5 V and it is TTL/CMOS compatible with VIH of 2 V minimum and VIL of 0.8 V maximum at 4.5 V ≤ VI(IN) ≤ 5.5 V.
5	EN2	input	Enable input for switch 2 that is active high on the TPS2090 and turns on the power switch; input range is 0 V to 5.5 V and it is TTL/CMOS compatible with VIH of 2 V minimum and VIL of 0.8 V maximum at 4.5 V ≤ VI(IN) ≤ 5.5 V.
6	OUT2	output	Power-switch output of channel 2, limited to 250 mA continuous per switch and to about 0.5 A (0.3 A to 0.7 A) in short-circuit current limit.
7	OUT1	output	Power-switch output of channel 1, limited to 250 mA continuous per switch and to about 0.5 A (0.3 A to 0.7 A) in short-circuit current limit.
8	OC	output	Overcurrent open-drain output that is asserted active low on overcurrent or overtemperature; it sinks up to 10 mA with a 0.5 V maximum output-low voltage at 5 mA.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	SOIC-8
Category	Power Management (PMIC)
Pins	8

CAD (KiCad official)

Symbol: TPS2090DR
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: tps2090dr-etched.step / tps2090dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2090dr.step / tps2090dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (27 pp, sha256 890f3d5b3f8d9806, retrieved 2026-10-11, tier: manufacturer)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TPS2090DR

**Texas Instruments** · Power Distribution Switches · SOIC-8

TPS2090DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground reference for the device; all voltages are specified with respect to GND. |
| 2 | IN1 | input | N-channel MOSFET drain of switch 1 (power input); the device operates from 2.7 V to 5.5 V and a 0.01 µF to 0.1 µF ceramic bypass to GND is recommended close to the device. |
| 3 | IN2 | input | N-channel MOSFET drain of switch 2 (power input); the device operates from 2.7 V to 5.5 V and a 0.01 µF to 0.1 µF ceramic bypass to GND is recommended close to the device. |
| 4 | EN1 | input | Enable input for switch 1 that is active high on the TPS2090 and turns on the power switch; input range is 0 V to 5.5 V and it is TTL/CMOS compatible with VIH of 2 V minimum and VIL of 0.8 V maximum at 4.5 V ≤ VI(IN) ≤ 5.5 V. |
| 5 | EN2 | input | Enable input for switch 2 that is active high on the TPS2090 and turns on the power switch; input range is 0 V to 5.5 V and it is TTL/CMOS compatible with VIH of 2 V minimum and VIL of 0.8 V maximum at 4.5 V ≤ VI(IN) ≤ 5.5 V. |
| 6 | OUT2 | output | Power-switch output of channel 2, limited to 250 mA continuous per switch and to about 0.5 A (0.3 A to 0.7 A) in short-circuit current limit. |
| 7 | OUT1 | output | Power-switch output of channel 1, limited to 250 mA continuous per switch and to about 0.5 A (0.3 A to 0.7 A) in short-circuit current limit. |
| 8 | OC | output | Overcurrent open-drain output that is asserted active low on overcurrent or overtemperature; it sinks up to 10 mA with a 0.5 V maximum output-low voltage at 5 mA. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |

## CAD (KiCad official)

- Symbol: `TPS2090DR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `tps2090dr-etched.step` / `tps2090dr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps2090dr.step` / `tps2090dr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/tps2090.pdf) (27 pp, sha256 `890f3d5b3f8d9806`, retrieved 2026-10-11, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps2090dr-datasheet.pdf)