component
TPS2066CDR
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 19d ago |
| viewers | 19d ago |
| package.json | 19d ago |
| page.json | 19d ago |
| README.md | 19d ago |
| tps2066cdr-etched.glb | 19d ago |
| tps2066cdr-etched.step | 19d ago |
| tps2066cdr-hero.glb | 19d ago |
| tps2066cdr-hero.overlay.json | 19d ago |
| tps2066cdr.glb | 19d ago |
| tps2066cdr.kicad_mod | 19d ago |
| tps2066cdr.kicad_sym | 19d ago |
| tps2066cdr.lbr | 19d ago |
| tps2066cdr.step | 19d ago |
TPS2066CDR
Texas Instruments · Power Distribution Switches · SOIC-8
TPS2066CDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground connection for the device; all voltages are referenced to GND. |
| 2 | IN | power_in | Input voltage and power-switch drain, operating from 4.5 V to 5.5 V; connect a 0.1 µF or greater ceramic capacitor from IN to GND close to the IC. |
| 3 | EN1 | input | Enable input for channel 1 (active-high on TPS2066C): a logic high turns on the power switch, with the enable input rated 0 V to 5.5 V. |
| 4 | EN2 | input | Enable input for channel 2 (active-high on TPS2066C): a logic high turns on the power switch, with the enable input rated 0 V to 5.5 V. |
| 5 | FLT2 | output | Active-low open-drain output asserted during overcurrent or overtemperature conditions on channel 2, with sink current limited to 0 to 5 mA. |
| 6 | OUT2 | output | Power-switch output for channel 2, connected to the load. |
| 7 | OUT1 | output | Power-switch output for channel 1, connected to the load. |
| 8 | FLT1 | output | Active-low open-drain output asserted during overcurrent or overtemperature conditions on channel 1, with sink current limited to 0 to 5 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | SOIC-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS2066CDR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
tps2066cdr-etched.step/tps2066cdr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2066cdr.step/tps2066cdr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (47 pp, sha256
15625e171ed16a5d, retrieved 2026-10-11, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).