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TPS2064DRBR

Public Made by Adom

by adom

Texas Instruments Power Distribution Switches, VSON-8-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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package.json tps2064drbr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 9d ago
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README.md Publish 0.1.0 · Ray 15d ago
tps2064drbr-etched.glb tps2064drbr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 9d ago
tps2064drbr-etched.step tps2064drbr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 9d ago
tps2064drbr-hero.glb tps2064drbr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 9d ago
tps2064drbr-hero.overlay.json tps2064drbr: etched from the flattened plain STEP (service-occt 1.6.0, from the plain STEP) · Ray 9d ago
tps2064drbr.glb plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 9d ago
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tps2064drbr.kicad_sym Publish 0.1.0 · Ray 15d ago
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tps2064drbr.step plain STEP: one free product with face colours (generated model was nested; tscircuit read it white) · Ray 9d ago

TPS2064DRBR

Texas Instruments · Power Distribution Switches · VSON-8-EP(3x3)

TPS2064DRBR from Texas Instruments, in a VSON-8-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the device; the PowerPad must be connected externally to GND.
2 IN input Input voltage to the power switches, specified at 2.7 V to 5.5 V in recommended operation (absolute maximum -0.3 V to 6 V).
3 EN1 input Enable input for power switch IN-OUT1; on the TPS2064 it is active high, with VIH of 2 V minimum and VIL of 0.8 V maximum for 2.7 V < VI(IN) < 5.5 V.
4 EN2 input Enable input for power switch IN-OUT2; on the TPS2064 it is active high, with VIH of 2 V minimum and VIL of 0.8 V maximum for 2.7 V < VI(IN) < 5.5 V.
5 OC2 output Open-drain overcurrent output for IN-OUT2, active low, with VOL of 0.4 V maximum at 5 mA and a 4 to 15 ms deglitch.
6 OUT2 output Power-switch output for IN-OUT2, with 70 mΩ typical on-state resistance at 5 V and 1.5 A maximum continuous output current.
7 OUT1 output Power-switch output for IN-OUT1, with 70 mΩ typical on-state resistance at 5 V and 1.5 A maximum continuous output current.
8 OC1 output Open-drain overcurrent output for IN-OUT1, active low, with VOL of 0.4 V maximum at 5 mA and a 4 to 15 ms deglitch.
9 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VSON-8-EP(3x3)
Category Power Supply Chip
Pins 9

CAD (KiCad official)

  • Symbol: TPS2064DRBR
  • Footprint: Package_SON:VSON-8-1EP_3x3mm_P0.65mm_EP1.6x2.4mm
  • 3D model: VSON-8-EP(3x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: tps2064drbr-etched.step / tps2064drbr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2064drbr.step / tps2064drbr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (40 pp, sha256 6f59433782dc9d56, retrieved 2026-10-11, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF