main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 10h ago
viewers tps2064cdgnr: viewers · Ray 10h ago
package.json Publish 0.1.0 · Ray 10h ago
page.json Set visibility: public · Ray 10h ago
README.md Initial commit: component/tps2064cdgnr · Ray 10h ago
tps2064cdgnr-etched.glb tps2064cdgnr: factory component page (tier=lcsc) · Ray 10h ago
tps2064cdgnr-etched.step tps2064cdgnr: factory component page (tier=lcsc) · Ray 10h ago
tps2064cdgnr-hero.glb tps2064cdgnr: hero GLB from the etched model (keeps the MPN mark) · Ray 10h ago
tps2064cdgnr-hero.overlay.json Publish 0.1.0 · Ray 10h ago
tps2064cdgnr.glb Publish 0.1.0 · Ray 10h ago
tps2064cdgnr.kicad_mod Publish 0.1.0 · Ray 10h ago
tps2064cdgnr.kicad_sym Publish 0.1.0 · Ray 10h ago
tps2064cdgnr.lbr Publish 0.1.0 · Ray 10h ago
tps2064cdgnr.step Publish 0.1.0 · Ray 10h ago

TPS2064CDGNR

Texas Instruments · Power Distribution Switches · MSOP-8

TPS2064CDGNR from Texas Instruments, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground connection for the device.
2 IN power_in Input voltage and power-switch drain, with a recommended operating range of 4.5 V to 5.5 V; connect a 0.1 µF or greater ceramic capacitor from IN to GND close to the IC.
3 EN1 input Enable input for channel 1; logic high turns on the power switch, and the enable input voltage range is 0 V to 5.5 V.
4 EN2 input Enable input for channel 2; logic high turns on the power switch, and the enable input voltage range is 0 V to 5.5 V.
5 FLT2 output Active-low open-drain output asserted during overcurrent or overtemperature on channel 2, with a sink current of 0 to 5 mA into FLTx.
6 OUT2 power_out Power-switch output for channel 2, connected to the load.
7 OUT1 power_out Power-switch output for channel 1, connected to the load.
8 FLT1 output Active-low open-drain output asserted during overcurrent or overtemperature on channel 1, with a sink current of 0 to 5 mA into FLTx.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package MSOP-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TPS2064CDGNR
  • Footprint: Package_SO:MSOP-8_3x3mm_P0.65mm
  • 3D model: MSOP-8 (KiCad packages3D, STEP)
  • 3D model files: tps2064cdgnr-etched.step / tps2064cdgnr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2064cdgnr.step / tps2064cdgnr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (45 pp, sha256 38cf20e1c6edf833, retrieved 2026-10-08, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF