component
TPS2052CDGNR
Public Made by Adomby adom
Texas Instruments Power Distribution Switches, MSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 28d ago |
| viewers | 28d ago |
| package.json | 28d ago |
| page.json | 28d ago |
| README.md | 28d ago |
| tps2052cdgnr-etched.glb | 28d ago |
| tps2052cdgnr-etched.step | 28d ago |
| tps2052cdgnr-hero.glb | 28d ago |
| tps2052cdgnr-hero.overlay.json | 28d ago |
| tps2052cdgnr.glb | 28d ago |
| tps2052cdgnr.kicad_mod | 28d ago |
| tps2052cdgnr.kicad_sym | 28d ago |
| tps2052cdgnr.lbr | 28d ago |
| tps2052cdgnr.step | 28d ago |
TPS2052CDGNR
Texas Instruments · Power Distribution Switches · MSOP-8
TPS2052CDGNR from Texas Instruments, in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Ground connection; all device voltages are referenced to GND unless otherwise noted. |
| 2 | IN | input | Input voltage and power-switch drain, operating from 4.5 V to 5.5 V; connect a 0.1 µF or greater ceramic capacitor from IN to GND close to the IC. |
| 3 | EN1 | input | Enable input for channel 1; logic high turns on the power switch, with the ENx input voltage range being 0 V to 5.5 V. |
| 4 | EN2 | input | Enable input for channel 2; logic high turns on the power switch, with the ENx input voltage range being 0 V to 5.5 V. |
| 5 | FLT2 | output | Active-low open-drain fault output asserted during overcurrent or overtemperature on channel 2, with sink current limited to 0 to 5 mA. |
| 6 | OUT2 | output | Power-switch output for channel 2, connected to the load, with continuous output current rated at 0.5 A for TPS2052C. |
| 7 | OUT1 | output | Power-switch output for channel 1, connected to the load, with continuous output current rated at 0.5 A for TPS2052C. |
| 8 | FLT1 | output | Active-low open-drain fault output asserted during overcurrent or overtemperature on channel 1, with sink current limited to 0 to 5 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | MSOP-8 |
| Category | Power Management (PMIC) |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
TPS2052CDGNR - Footprint:
Package_SO:MSOP-8_3x3mm_P0.65mm - 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files:
tps2052cdgnr-etched.step/tps2052cdgnr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps2052cdgnr.step/tps2052cdgnr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (45 pp, sha256
38cf20e1c6edf833, retrieved 2026-10-12, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).