Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

TPS2049DR

Texas Instruments · Power Distribution Switches · SOIC-8

TPS2049DR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GND power_in Ground reference for the device; all device voltages are specified with respect to GND.
2 IN power_in Power-switch input voltage, recommended range 2.7 V to 5.5 V; the UVLO keeps the switch off below approximately 2 V.
3 IN power_in Power-switch input voltage, recommended range 2.7 V to 5.5 V; pin 3 is a second IN pin tied to the same input node as pin 2.
4 EN input Active-low enable input that turns the power switch on when logic low; VI(EN) is rated 0 V to 5.5 V and is TTL/CMOS compatible.
5 OC output Active-low open-drain overcurrent/overtemperature report output, deglitched by about 10 ms; VOL is 0.4 V max at 5 mA sink.
6 OUT power_out Power-switch output of the 600-mΩ N-channel high-side MOSFET; continuous output current recommended 0 to 100 mA.
7 OUT power_out Power-switch output of the 600-mΩ N-channel high-side MOSFET; continuous output current recommended 0 to 100 mA; tied to the same output node as pins 6 and 8.
8 OUT power_out Power-switch output of the 600-mΩ N-channel high-side MOSFET; continuous output current recommended 0 to 100 mA; tied to the same output node as pins 6 and 7.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-8
Category Power Management (PMIC)
Pins 8

CAD (KiCad official)

  • Symbol: TPS2049DR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tps2049dr-etched.step / tps2049dr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2049dr.step / tps2049dr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (18 pp, sha256 a8ae0bfc5b951c66, retrieved 2026-10-07, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF