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Contents

README

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TPS2041BMDBVTEP

Texas Instruments · Power Distribution Switches · SOT-23-5

TPS2041BMDBVTEP from Texas Instruments, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OUT output Power-switch output of the 70-mΩ N-channel high-side MOSFET, with a continuous output current of 0 to 500 mA recommended.
2 GND power_in Ground reference for the device; all voltages are specified with respect to GND.
3 OC output Open-drain overcurrent output, asserted active low on overcurrent or overtemperature, with VOL of 0.4 V maximum at IO(OC) = 5 mA.
4 EN input Enable input where logic low turns on the power switch; VIH is 2 V minimum and VIL is 0.8 V maximum for 2.7 V ≤ VI(IN) ≤ 5.5 V, with VI(EN) rated 0 to 5.5 V.
5 IN input Input voltage pin for the power switch, rated 2.7 V to 5.5 V recommended with an absolute maximum of -0.3 V to 6 V.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOT-23-5
Category Power Management (PMIC)
Pins 5

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Input voltage (IN) VI(IN) 2.7 5.5 V 2
Input voltage (EN) VI(EN) 0 5.5 V 2
Continuous output current (OUT) IO(OUT) 0 500 mA 2
Operating virtual-junction temperature TJ -55 125 °C 2
Input voltage range (IN) VI(IN) -0.3 6 V 2
Output voltage range (OUT) VO(OUT) -0.3 6 V 2
Input voltage range (EN) VI(EN) -0.3 6 V 2
Voltage range (OC) VI(OC) -0.3 6 V 2
Operating virtual-junction temperature range TJ -55 135 °C 2
Storage temperature range Tstg -65 150 °C 2
Continuous power dissipation 182 mW at 125°C 2
Lead temperature, soldering 260 °C 1,6 mm (1/16 in) from case for 10 s 2
Electrostatic discharge protection, Human-Body Model (HBM) 2500 V HBM (H2) 2
Electrostatic discharge protection, Machine Model (MM) 50 V MM (M0) 2
Electrostatic discharge protection, Charged-Device Model (CDM) 1500 V CDM (C5) 2
Thermal resistance, junction-to-case θJC 55 °C/W 2
Static drain-source on-state resistance, 5-V or 3.3-V operation rDS(on) 70 135 mΩ VI(IN) = 5 V or 3.3 V, IO = 0.5 A, -55°C ≤ TJ ≤ 125°C 3
Static drain-source on-state resistance, 2.7-V operation rDS(on) 75 150 mΩ VI(IN) = 2.7 V, IO = 0.5 A, -55°C ≤ TJ ≤ 125°C 3
High-level input voltage (EN) VIH 2 V 2.7 V ≤ VI(IN) ≤ 5.5 V 3
Low-level input voltage (EN) VIL 0.8 V 2.7 V ≤ VI(IN) ≤ 5.5 V 3
Input current (EN) II -1 1 μA VI(EN) = 0 V or 5.5 V 3
Short-circuit output current, TJ = 25°C IOS 0.65 1 1.3 A VI(IN) = 5 V, OUT connected to GND, TJ = 25°C 3
Short-circuit output current, device enabled into short-circuit IOS 0.45 1 1.55 A VI(IN) = 5 V, OUT connected to GND, device enabled into short-circuit, -55°C ≤ TJ ≤ 125°C 3
Supply current, low-level output, TJ = 25°C 0.5 1 μA No load on OUT, TJ = 25°C, VI(EN) = 5.5 V or VI(EN) = 0 V 3
Supply current, low-level output, full temperature range 0.5 5 μA VI(EN) = 5.5 V or VI(EN) = 0 V, -55°C ≤ TJ ≤ 125°C 3
Supply current, high-level output, TJ = 25°C 43 60 μA No load on OUT, TJ = 25°C, VI(EN) = 0 V or VI(EN) = 5.5 V 3
Supply current, high-level output, full temperature range 43 70 μA VI(EN) = 0 V or VI(EN) = 5.5 V, -55°C ≤ TJ ≤ 125°C 3
Leakage current 1 μA OUT connected to ground, -55°C ≤ TJ ≤ 125°C, VI(EN) = 5.5 V or VI(EN) = 0 V 3
Reverse leakage current 0 μA VI(OUT) = 5.5 V, IN = ground, TJ = 25°C 3
Low-level input voltage, IN (UVLO) 2 2.5 V 3
Hysteresis, IN (UVLO) 75 mV TJ = 25°C 3
Output low voltage, VOL(/OC) VOL(/OC) 0.4 V IO(OC) = 5 mA 3
Off-state current (OC) 1 μA VO(OC) = 5 V or 3.3 V 3
OC deglitch 3 8 16 ms OC assertion or deassertion 3
Thermal shutdown threshold 135 °C 3
Recovery from thermal shutdown 125 °C 3
Thermal shutdown hysteresis 10 °C 3

CAD (KiCad official)

  • Symbol: TPS2041BMDBVTEP
  • Footprint: Package_TO_SOT_SMD:SOT-23-5
  • 3D model: SOT-23-5 (KiCad packages3D, STEP)
  • 3D model files: tps2041bmdbvtep-etched.step / tps2041bmdbvtep-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps2041bmdbvtep.step / tps2041bmdbvtep.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (23 pp, sha256 d830ee3c87946a62, retrieved 2026-11-05, tier: manufacturer)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF