component
TPS1HTC100QPWPRQ1
Public Made by Adomby adom
TI(德州仪器) Power Distribution Switches, HTSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Made with KiCad 10.0 · needs KiCad 10.0 or later to open · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9d ago |
| viewers | 9d ago |
| package.json | 9d ago |
| page.json | 9d ago |
| README.md | 9d ago |
| tps1htc100qpwprq1-etched.glb | 9d ago |
| tps1htc100qpwprq1-etched.step | 9d ago |
| tps1htc100qpwprq1-hero.glb | 9d ago |
| tps1htc100qpwprq1-hero.overlay.json | 9d ago |
| tps1htc100qpwprq1.glb | 9d ago |
| tps1htc100qpwprq1.kicad_mod | 9d ago |
| tps1htc100qpwprq1.kicad_sym | 9d ago |
| tps1htc100qpwprq1.lbr | 9d ago |
| tps1htc100qpwprq1.step | 9d ago |
TPS1HTC100QPWPRQ1
TI(德州仪器) · Power Distribution Switches · HTSSOP-14
TPS1HTC100QPWPRQ1 from TI(德州仪器), in a HTSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GND | power_in | Power ground of the device; connect to a resistor-diode ground network to have reverse battery protection. |
| 2 | EN | input | Input control for channel activation with internal pulldown; enable voltage is limited to -1 V to 5.5 V. |
| 3 | DIAG_EN | input | Enable-disable pin for diagnostics with internal pulldown; diagnostic enable voltage is limited to -1 V to 5.5 V. |
| 4 | FAULT | output | Open-drain global fault output (referred to as FLT or fault pin); FAULT pin voltage is limited to -1 V to 5.5 V. |
| 5 | LATCH | input | Selects thermal shutdown behavior, latch-off or auto-retry, with internal pulldown; LATCH pin voltage is limited to -1 V to 5.5 V. |
| 6 | SNS | output | Outputs the sense value corresponding to the sense ratio; sense voltage is limited to -1 V to 5.5 V. |
| 7 | ILIM | output | Adjustable current limit pin; short to ground or leave floating if an external current limit is not used (floating is a fault state, default internal threshold applies). |
| 8 | VOUT | power_out | Power output of the high-side switch, connected to the load; VOUT is rated -60 V to 70 V with respect to IC GND. |
| 9 | VOUT | power_out | Power output of the high-side switch, connected to the load; VOUT is rated -60 V to 70 V with respect to IC GND. |
| 10 | VOUT | power_out | Power output of the high-side switch, connected to the load; VOUT is rated -60 V to 70 V with respect to IC GND. |
| 11 | NC | unconnected | No internal connection. |
| 12 | VS | power_in | Power supply; nominal operating supply is 6 V to 60 V, with continuous supply voltage absolute maximum of -0.7 V to 70 V. |
| 13 | VS | power_in | Power supply; nominal operating supply is 6 V to 60 V, with continuous supply voltage absolute maximum of -0.7 V to 70 V. |
| 14 | VS | power_in | Power supply; nominal operating supply is 6 V to 60 V, with continuous supply voltage absolute maximum of -0.7 V to 70 V. |
| 15 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TI(德州仪器) |
| Package | HTSSOP-14 |
| Category | Power Management (PMIC) |
| Pins | 15 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Continuous supply voltage, VS with respect to IC GND | VS | -0.7 | 70 | V | 4 | ||
| Continuous output voltage, VOUT with respect to IC GND | VOUT | -60 | 70 | V | 4 | ||
| Maximum transient voltage at supply pin, VS with respect to IC GND | -0.7 | 81 | V | < 100 us | 4 | ||
| Enable pin voltage | VEN | -1 | 7 | V | 4 | ||
| LATCH pin voltage | VLATCH | -1 | 7 | V | 4 | ||
| DIAG_EN pin voltage | VDIAG_EN | -1 | 7 | V | 4 | ||
| Sense pin voltage | VSNS | -1 | 7 | V | 4 | ||
| FAULT pin voltage | VFAULT | -1 | 7 | V | 4 | ||
| Reverse ground current | IGND | -50 | mA | VS < 0 V | 4 | ||
| Maximum junction temperature | TJ | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Nominal supply voltage | VS_OP_NOM | 6 | 60 | V | 4 | ||
| Enable voltage | VEN | -1 | 5.5 | V | 4 | ||
| LATCH pin voltage | VLATCH | -1 | 5.5 | V | 4 | ||
| Diagnostic enable voltage | VDIAG_EN | -1 | 5.5 | V | 4 | ||
| FAULT pin voltage | VFAULT | -1 | 5.5 | V | 4 | ||
| Sense voltage | VSNS | -1 | 5.5 | V | 4 | ||
| Operating free-air temperature | TA | -40 | 125 | °C | 4 | ||
| Continuous load current | ILNOM | 4 | A | VEN = 0V, TAMB = 85°C | 5 | ||
| VS quiescent current | IQ, VS | 0.98 | 1.3 | mA | VEN = 5V, IOUT = 0A, VDIAG_EN = 0V | 5 | |
| VS quiescent current | IQ, VS | 1.2 | 1.65 | mA | VEN = 5V, IOUT = 0A, VDIAG_EN = 5V | 5 | |
| Total device standby current (including MOSFET) | ISTBY, VS | 0.25 | 0.7 | µA | VEN = VDIAG_EN = 0V, VOUT = 0V, TJ = -40°C to 85°C | 5 | |
| Total device standby current (including MOSFET) | ISTBY, VS | 0.83 | 11 | µA | VEN = VDIAG_EN = 0V, VOUT = 0V, TJ = 150°C | 5 | |
| Output leakage current | IOUT(STBY) | 0.65 | µA | VEN = 0V, VOUT = 0V, VDIAG = 0V, TJ = -40°C to 85°C | 5 | ||
| Output leakage current | IOUT(STBY) | 0.28 | 10 | µA | VEN = 0V, VOUT = 0V, VDIAG = 0V, TJ = 150°C | 5 | |
| VS undervoltage lockout rising | VS,UVLOR | 5 | 5.4 | 5.75 | V | Measured with respect to the GND pin of the device | 5 |
| VS undervoltage lockout falling | VS,UVLOF | 4.1 | 4.5 | 4.85 | V | Measured with respect to the GND pin of the device | 5 |
| VDS clamp voltage | VDS,Clamp | 70 | 78.9 | 84.5 | V | FET current = 10mA, VS = 24V | 5 |
| VDS clamp voltage | VDS,Clamp | 48 | 53 | 58 | V | FET current = 10mA, VS = 6V | 5 |
| On-resistance | RON | 180 | mΩ | 0.5A ≤ IOUT ≤ 3A, TJ = 150°C | 5 | ||
| On-resistance during reverse polarity | RON(REV) | 180 | mΩ | 0.5A ≤ IOUT ≤ 3A, VS = -24V, TJ = -40°C to 150°C | 5 | ||
| Current limit level | ICL | 0.73 | 0.92 | 1.11 | A | Short circuit condition, VDS = 1V, RILIM = 50kΩ | 6 |
| Current limit level | ICL | 1.5 | 1.96 | 2.3 | A | Short circuit condition, VDS = 1V, RILIM = 25kΩ | 6 |
| Current limit level | ICL | 2.3 | 3 | 3.5 | A | Short circuit condition, VDS = 1V, RILIM = 16.7kΩ | 6 |
| Current limit level | ICL | 4 | 5.3 | 6.3 | A | Short circuit condition, VDS = 1V, RILIM = 10kΩ | 6 |
| Current limit level | ICL | 3.05 | 3.5 | 4.3 | A | Short circuit condition, VDS = 1V, RILIM = Open or Out of range | 6 |
| Current limit level | ICL | 6.1 | 7.3 | 8.6 | A | Short circuit condition, VDS = 1V, RILIM = GND | 6 |
| FAULT low output voltage | VFAULT | 0.5 | V | IFAULT = 2.5mA | 6 | ||
| VSNS fault high-level | VSNSFH | 4.5 | 5 | 5.77 | V | VDIAG_EN = 5V | 7 |
| VSNS fault high-level | VSNSFH | 3.3 | 3.95 | 4.4 | V | VDIAG_EN = 3.3V, RSNS = Open | 7 |
| ISNS fault high-level | ISNSFLT | 5.2 | 6.4 | mA | VDIAG_EN > VIH,DIAG_EN | 7 | |
| OFF state open-load (OL) detection voltage | VOL_OFF | 1.4 | 2 | 2.6 | V | VEN = 0V, VDIAG_EN = 5V | 7 |
| Input voltage low-level (DIAG_EN) | VIL, DIAG_EN | 0.8 | V | No GND Network | 7 | ||
| Input voltage high-level (DIAG_EN) | VIH, DIAG_EN | 1.5 | V | No GND Network | 8 | ||
| Input voltage low-level (EN) | VIL, EN | 0.8 | V | No GND Network | 8 | ||
| Input voltage high-level (EN) | VIH, EN | 1.5 | V | No GND Network | 8 | ||
| Current sense accuracy (ISNS ratio error) | ISNS | -5 | 6 | % | VEN = VDIAG_EN = 5V, IOUT = 4A | 7 | |
| Current sense accuracy (ISNS ratio error) | ISNS | -5 | 5 | % | VEN = VDIAG_EN = 5V, IOUT = 1A | 7 | |
| Current sense accuracy (ISNS ratio error) | ISNS | -30 | 30 | % | VEN = VDIAG_EN = 5V, IOUT = 10mA | 7 | |
| Turn-off delay time | tDF | 20 | 65 | 98 | µs | 50% of EN to 80% of VOUT | 9 |
| VOUT rising slew rate | SRR | 0.1 | 0.47 | 0.7 | V/µs | 20% to 80% of VOUT | 9 |
| Minimum VOUT OFF pulse width | tOFF_pw | 82 | 130 | 175 | µs | 200µs OFF time switch enable pulse, VOUT @20% of VS, F = fmax | 9 |
| On-resistance | RON | 83 | mΩ | 0.5A ≤ IOUT ≤ 3A, TJ = 25°C | 5 | ||
| Thermal shutdown | TABS | 165 | °C | 6 | |||
| Junction-to-ambient thermal resistance | RθJA | 33.7 | °C/W | 5 | |||
| Junction-to-case (top) thermal resistance | RθJC(top) | 34.9 | °C/W | 5 | |||
| Junction-to-board thermal resistance | RθJB | 10.2 | °C/W | 5 | |||
| Junction-to-top characterization parameter | ψJT | 1.1 | °C/W | 5 | |||
| Junction-to-board characterization parameter | ψJB | 10.2 | °C/W | 5 | |||
| Junction-to-case (bottom) thermal resistance | RθJC(bot) | 2.7 | °C/W | 5 |
CAD (KiCad official)
- Symbol:
TPS1HTC100QPWPRQ1 - Footprint:
Package_SO:TSSOP-14-1EP_4.4x5mm_P0.65mm - 3D model: HTSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
tps1htc100qpwprq1-etched.step/tps1htc100qpwprq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);tps1htc100qpwprq1.step/tps1htc100qpwprq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TI(德州仪器) datasheet (43 pp, sha256
757132f4d2bfc637, retrieved 2026-10-19, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).