TPS16850VMAR - 9 V to 80 V, 20 A eFuse

{
 "schema": "adom/3d-model-provenance@1",
 "mpn": "TPS16850VMAR",
 "date": "2026-10-21",
 "classification": "Datasheet-built: a CadQuery model generated from TI's printed VMA0023A package values, produced by Claude (AI) for Adom. Not manufacturer CAD and not a TI certification.",
 "method_chosen": "3 (build from the drawing): TI's own STEP was not reachable with plain HTTP and KiCad has no VMA0023A model",
 "manufacturer_step": {
  "tried": [
   "https://www.ti.com/product/TPS1685 (CAD/CAE links to Ultra Librarian)",
   "https://vendor.ultralibrarian.com/TI/embedded/?gpn=TPS1685&package=VMA&pin=23 (STEP export form)"
  ],
  "result": "the STEP export is a form behind reCAPTCHA (POST /TI/Export/Start returned 404 to a plain request on 2026-10-21); no browser was used, so TI's model was not obtained",
  "status": "not reachable"
 },
 "kicad_library": "KiCad's packages3D and footprint libraries have no VMA0023A / LQFN-CLIP-23 package (Package_DFN_QFN listed 2026-10-21)",
 "datasheet": {
  "doc": "TI SLVSHA1D (Rev. D, revised July 2026), TPS1685x",
  "file": "docs/tps16850vmar-datasheet.pdf",
  "url": "https://www.ti.com/lit/ds/symlink/tps1685.pdf",
  "sha256": "fe9d96bfb8f8e13b5cd69cb8eb19f73c87d5f1945637e00308aff68077f31f0c",
  "drawing_pages": "p.54 PACKAGE OUTLINE, p.55 LAND PATTERN, p.56 STENCIL (VMA0023A, 4230225/A 11/2023)",
  "marking_page": "p.50 (Package Option Addendum: TPS16850)"
 },
 "model": {
  "file": "tps16850vmar.step",
  "sha256": "34e33e779b6b92ffc048bf33a89dd3df7f246fd69638259933d5915d814a55f8",
  "builder": "provenance/tools/build_vma23.py (CadQuery 2.x, OpenCascade)",
  "frame": "Z up, seated on z = 0, centred on the package centre lines = the KiCad footprint origin, X along the 6.0 mm side, Y = -KiCad y; pin 1 (ILIM) terminal at (-2.75, +0.5), footprint pad 1 at (-2.875, -0.5) in KiCad's Y-down frame; binds with zero offset and rotation",
  "how": "mould block 6.0 x 5.0 x 1.4 above a 0.025 mm stand-off with the terminal volume cut out; 23 terminals and the exposed pad as 0.2 mm plates flush with the side walls, shapes as drawn (combs on 7, 10, 22; L shapes on 6, 17; rounded inner ends), the outer 0.02 mm of every terminal at a side wall coloured copper (sawn ends)",
  "bottom_view_note": "TI prints the bottom view turned over about the X axis (pin 1 below the centre line); y values read from it are negated",
  "undimensioned": "pin 7 bar inner edge (1.95 from the centre line) and notch depth (0.25) measured off the drawing at 118 px/mm; terminal thickness taken as the (0.2) side exposure",
  "colours": "TI's VMA package render (DigiKey image MFG_296~4230225~VMA~23): dark grey mould, silver NiPdAu terminal faces (TI lead finish NIPDAU, p.50), copper sawn ends",
  "parts": {
   "body": "dark grey mould",
   "pins": "NiPdAu terminal faces",
   "pin_ends": "sawn copper ends"
  },
  "dimensions_mm": [
   {
    "item": "D body length (X)",
    "datasheet_min_typ_max": "5.9 / - / 6.1",
    "model": "6.000"
   },
   {
    "item": "E body width (Y)",
    "datasheet_min_typ_max": "4.9 / - / 5.1",
    "model": "5.000"
   },
   {
    "item": "A height",
    "datasheet_min_typ_max": "1.3 / - / 1.5",
    "model": "1.400"
   },
   {
    "item": "A1 terminal stand-off",
    "datasheet_min_typ_max": "0.00 / - / 0.05",
    "model": "0.025"
   },
   {
    "item": "b terminal width",
    "datasheet_min_typ_max": "0.2 / - / 0.3 (28X)",
    "model": "0.250"
   },
   {
    "item": "pin 7 tooth width",
    "datasheet_min_typ_max": "0.15 / - / 0.25 (4X)",
    "model": "0.200"
   },
   {
    "item": "pin 6 leg width",
    "datasheet_min_typ_max": "0.25 / - / 0.35",
    "model": "0.300"
   },
   {
    "item": "L left terminals 1-5",
    "datasheet_min_typ_max": "0.4 / - / 0.6",
    "model": "0.500"
   },
   {
    "item": "L right terminals 11-16",
    "datasheet_min_typ_max": "0.35 / - / 0.55 (10X)",
    "model": "0.450"
   },
   {
    "item": "L top terminals 18-21",
    "datasheet_min_typ_max": "0.3 / - / 0.5 (4X)",
    "model": "0.400"
   },
   {
    "item": "L bottom terminals 8, 9",
    "datasheet_min_typ_max": "0.45 / - / 0.65 (3X)",
    "model": "0.550"
   },
   {
    "item": "pin 23 length",
    "datasheet_min_typ_max": "1.0 / - / 1.2",
    "model": "1.100"
   },
   {
    "item": "pin 10 bar",
    "datasheet_min_typ_max": "0.35 / - / 0.45 at 2.05",
    "model": "0.400 at 2.05"
   },
   {
    "item": "pin 22 bar edge from package edge",
    "datasheet_min_typ_max": "0.475 / - / 0.675",
    "model": "0.575"
   },
   {
    "item": "exposed pad",
    "datasheet_min_typ_max": "3.4 +-0.1 x 2.35 +-0.1, centre 0.075 off the centre line",
    "model": "3.400 x 2.350 at 0.075"
   },
   {
    "item": "pin-1 chamfer on the exposed pad",
    "datasheet_min_typ_max": "45 deg x 0.25",
    "model": "45 deg x 0.25"
   },
   {
    "item": "side terminal exposure",
    "datasheet_min_typ_max": "(0.2) TYP",
    "model": "0.200"
   }
  ],
  "not_modelled": "TI's top-side pin-1 index area is a region, not a mark, and the real marking (TPS16850 plus lot code) is not modelled; the virtual MPN etch stands in"
 },
 "overlay": {
  "bottom": {
   "score": 0.9728,
   "scale": 118.25,
   "origin": [
    1193,
    2176
   ],
   "image": "proof-model-bottom.png"
  },
  "side": {
   "view": "front",
   "score": 0.7014,
   "scale": 118.25,
   "origin": [
    1193,
    1451
   ],
   "image": "proof-model-side.png",
   "note": "TI draws the side view at A max (1.5 mm); the model is at the nominal 1.4 mm, so its top edge sits 0.1 mm below TI's"
  },
  "images": [
   "docs/proof/tps16850vmar-model-vs-drawing-bottom.png",
   "docs/proof/tps16850vmar-model-vs-drawing-side.png"
  ],
  "method": "provenance/tools/overlay_vma.py: STEP rendered orthographically, scale and offset fitted to TI's blue strokes on the 300 dpi p.54 render"
 },
 "etched": {
  "file": "tps16850vmar-etched.step",
  "sha256": "15ef0f3945e0f6a08b63528edee6df68de23bae11e79c865b36fa0ffd3276ed1",
  "tool": "adom-chip-laser 0.2.0 via adom-aiflow-etch (service-occt flat mark 5 um above the top face, Adom.LaserEtch group)",
  "plan": "provenance/tps16850vmar-etched.mark-plan.json",
  "gate": "PASS",
  "check_image": "docs/proof/tps16850vmar-etched.check.png",
  "marking": {
   "text": "TPS16850 / VMAR (two lines)",
   "surface": "top, along the 6.0 mm axis, upright with pin 1 on the left",
   "colour": "light grey on dark grey mould",
   "virtual": true,
   "note": "virtual identification mark (the orderable MPN) by adom-chip-laser; TI's real marking is TPS16850 (SLVSHA1D p.50)"
  }
 },
 "glb": {
  "tool": "step2glb (service) convert --compress none, provenance/tools/glb_batch.py, materials.py",
  "files": [
   "tps16850vmar-etched.glb",
   "tps16850vmar.glb"
  ]
 },
 "hero": {
  "file": "tps16850vmar-hero.glb",
  "tool": "adom/component-hero 0.1.2 hero_glb.py (adom-hero 1.4): align OK, offset 0.0 mm; then provenance/tools/hero_post_vias.py adds the Adom.HeatsinkVias layer",
  "preview": "docs/proof/tps16850vmar-hero-preview.png"
 },
 "outline": {
  "file": "artwork/TPS16850VMAR-3d-outline-dark-named.svg",
  "tool": "adom-aiflow-etch outline (gate PASS)"
 },
 "license": "CC-BY-4.0 (Adom-authored model); TI's datasheet keeps TI's terms"
}