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TPS16850VMAR - 9 V to 80 V, 20 A eFuse
Public Made by Adomby adom
Texas Instruments TPS16850VMAR: 9 V to 80 V, 20 A stackable integrated hot-swap eFuse with a 3.5 mOhm FET, fast current monitor and auto-retry fault response, LQFN-CLIP-23 (VMA, 6.0 x 5.0 mm). KiCad symbol and footprint, Fusion and Altium libraries, datasheet-built 3D model and datasheet.
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{
"schema": "adom/models@1",
"part": "TPS16850VMAR",
"updated": "2026-10-21",
"models": [
{
"path": "tps16850vmar-etched.step",
"format": "step",
"sha256": "15ef0f3945e0f6a08b63528edee6df68de23bae11e79c865b36fa0ffd3276ed1",
"git_blob": "88ff60eb5763f11478a5fed1d561d7e517e7b518",
"bytes": 1908216,
"title": "TPS16850VMAR, virtual MPN etch (library model)",
"status": "current",
"slot": "model_3d_step",
"variant": "etched",
"role": "datasheet-built",
"use": [
"board-cad"
],
"marking": {
"text": "TPS16850 / VMAR (two lines)",
"surface": "top, along the 6.0 mm axis, upright with pin 1 on the left",
"colour": "light grey on dark grey mould",
"virtual": true,
"note": "virtual identification mark (the orderable MPN) by adom-chip-laser; TI's real marking is TPS16850 (SLVSHA1D p.50)"
},
"colours": true,
"derived_from": "tps16850vmar.step",
"unique": "The board-CAD model: built from TI's VMA0023A drawing with the MPN etched on top in the Adom.LaserEtch group; bound by the KiCad footprint and embedded in the Altium PcbLib",
"source": "provenance/tools/build_vma23.py + adom-chip-laser 0.2.0 (service-occt flat etch, placed by adom-aiflow-etch)",
"thumb": "docs/models/tps16850vmar-etched-glb-top.png",
"thumb_bottom": "docs/models/tps16850vmar-etched-bottom.png"
},
{
"path": "tps16850vmar.step",
"format": "step",
"sha256": "34e33e779b6b92ffc048bf33a89dd3df7f246fd69638259933d5915d814a55f8",
"git_blob": "14c37decb391d67a81b427b7e3166df559350cec",
"bytes": 1643198,
"title": "TPS16850VMAR, unmarked",
"status": "current",
"slot": "model_3d_step_plain",
"variant": "plain",
"role": "datasheet-built",
"use": [
"board-cad",
"archive"
],
"marking": null,
"colours": true,
"derived_from": "TI SLVSHA1D p.54 (VMA0023A, 4230225/A 11/2023)",
"unique": "The same package without any marking",
"source": "provenance/tools/build_vma23.py (CadQuery)",
"thumb": "docs/models/tps16850vmar-glb-top.png",
"thumb_bottom": "docs/models/tps16850vmar-bottom.png"
},
{
"path": "tps16850vmar-hero.glb",
"format": "glb",
"sha256": "5835866ecf6e8e2a408cd69f0b0f1863f6decb13f396c27613b06ca05ab14aac",
"git_blob": "d0896bcf92cf1e842f0b6d8e10f252f9f0a7df3b",
"bytes": 406968,
"title": "TPS16850VMAR, annotated hero (page viewer)",
"status": "current",
"slot": "model_3d",
"variant": "hero",
"role": "derived",
"use": [
"wiki-hero"
],
"marking": {
"text": "TPS16850 / VMAR (two lines)",
"surface": "top, along the 6.0 mm axis, upright with pin 1 on the left",
"colour": "light grey on dark grey mould",
"virtual": true,
"note": "virtual identification mark (the orderable MPN) by adom-chip-laser; TI's real marking is TPS16850 (SLVSHA1D p.50)"
},
"colours": true,
"derived_from": "tps16850vmar-etched.glb + tps16850vmar.kicad_mod",
"unique": "The page's 3D view: the etched chip plus teal dashed pad outlines, silkscreen with pin 1, pin names and the heatsink vias as switchable layers; presentation only, never for board use",
"source": "adom/component-hero 0.1.2 scripts/hero_glb.py (adom-hero 1.4) + provenance/tools/hero_post_vias.py",
"thumb": "docs/proof/tps16850vmar-hero-preview.png"
},
{
"path": "tps16850vmar-etched.glb",
"format": "glb",
"sha256": "2a49d1a2afab9135eb2af4a6c77c617bcad3b6cae0eb77c83ec58ebbe0b0e841",
"git_blob": "5c090831aa8644f482648b979745c5065f570de8",
"bytes": 162308,
"title": "TPS16850VMAR, virtual MPN etch (GLB, board use)",
"status": "current",
"slot": "model_3d_plain",
"variant": "etched",
"role": "derived",
"use": [
"render",
"board-insertion"
],
"marking": {
"text": "TPS16850 / VMAR (two lines)",
"surface": "top, along the 6.0 mm axis, upright with pin 1 on the left",
"colour": "light grey on dark grey mould",
"virtual": true,
"note": "virtual identification mark (the orderable MPN) by adom-chip-laser; TI's real marking is TPS16850 (SLVSHA1D p.50)"
},
"colours": true,
"derived_from": "tps16850vmar-etched.step",
"unique": "Web copy of the etched STEP, clean (no pad outlines, labels or silkscreen), primitives batched per part, NiPdAu terminals with sawn copper ends and a matte mould",
"source": "step2glb convert --compress none + provenance/tools/glb_batch.py + materials.py",
"thumb": "docs/models/tps16850vmar-etched-glb-top.png"
},
{
"path": "tps16850vmar.glb",
"format": "glb",
"sha256": "c7c1882a2428b0b0b52e93686f593c2da81655d23908cc3355b7e26a2d2d499b",
"git_blob": "2dc7d85ac795dc77c1a0e88275c80d4fd4b12710",
"bytes": 140676,
"title": "TPS16850VMAR, unmarked (GLB)",
"status": "current",
"variant": "plain",
"role": "derived",
"use": [
"render",
"board-insertion"
],
"marking": null,
"colours": true,
"derived_from": "tps16850vmar.step",
"unique": "Web copy of the unmarked STEP",
"source": "step2glb convert --compress none + glb_batch.py + materials.py",
"thumb": "docs/models/tps16850vmar-glb-top.png"
},
{
"path": "lod/tps16850vmar-high.glb",
"format": "glb",
"sha256": "2a49d1a2afab9135eb2af4a6c77c617bcad3b6cae0eb77c83ec58ebbe0b0e841",
"git_blob": "5c090831aa8644f482648b979745c5065f570de8",
"bytes": 162308,
"title": "TPS16850VMAR, high detail (board LOD)",
"status": "current",
"variant": "lod",
"role": "derived",
"use": [
"board-insertion"
],
"marking": {
"text": "TPS16850 / VMAR (two lines)",
"surface": "top, along the 6.0 mm axis, upright with pin 1 on the left",
"colour": "light grey on dark grey mould",
"virtual": true,
"note": "virtual identification mark (the orderable MPN) by adom-chip-laser; TI's real marking is TPS16850 (SLVSHA1D p.50)"
},
"colours": true,
"derived_from": "tps16850vmar-etched.step",
"unique": "Identical to the etched GLB",
"source": "build_vma23.py detail level + step2glb + glb_batch.py + materials.py",
"thumb": "lod/tps16850vmar-high.png"
},
{
"path": "lod/tps16850vmar-medium.glb",
"format": "glb",
"sha256": "8b65587b7a42719036c3e84e3f85891965ff2b0feeed19b18c2a46ad04a3adf6",
"git_blob": "203eeb84bab1f8a2c06c4ccef5666e0e3ca90052",
"bytes": 99960,
"title": "TPS16850VMAR, medium detail (board LOD)",
"status": "current",
"variant": "lod",
"role": "derived",
"use": [
"board-insertion"
],
"marking": {
"text": "TPS16850 / VMAR (two lines)",
"surface": "top, along the 6.0 mm axis, upright with pin 1 on the left",
"colour": "light grey on dark grey mould",
"virtual": true,
"note": "virtual identification mark (the orderable MPN) by adom-chip-laser; TI's real marking is TPS16850 (SLVSHA1D p.50)"
},
"colours": true,
"derived_from": "provenance/tools/build_vma23.py --detail low",
"unique": "Square inner terminal ends, etch grafted from the high level",
"source": "build_vma23.py detail level + step2glb + glb_batch.py + materials.py",
"thumb": "lod/tps16850vmar-medium.png"
},
{
"path": "lod/tps16850vmar-low.glb",
"format": "glb",
"sha256": "07b4d33824ce0db1b5e5de4b795b07f249649cf5d1ab930539def40db5cd880a",
"git_blob": "0cec5702a6e748cc72cbdc7f8dce3cdc7e635efe",
"bytes": 78452,
"title": "TPS16850VMAR, low detail (board LOD)",
"status": "current",
"variant": "lod",
"role": "derived",
"use": [
"board-insertion"
],
"marking": null,
"colours": true,
"derived_from": "provenance/tools/build_vma23.py --detail low",
"unique": "Square inner terminal ends, no etch",
"source": "build_vma23.py detail level + step2glb + glb_batch.py + materials.py",
"thumb": "lod/tps16850vmar-low.png"
},
{
"path": "lod/tps16850vmar-super-low.glb",
"format": "glb",
"sha256": "c85e3be247208a204fc3608517f9d97e9b4c6fc2c97c8b3a9d80bf49a4b61499",
"git_blob": "2b658a5682b7129fcfb23287ee415eb8f201f7b8",
"bytes": 52940,
"title": "TPS16850VMAR, super-low detail (board LOD)",
"status": "current",
"variant": "lod",
"role": "derived",
"use": [
"board-insertion"
],
"marking": null,
"colours": true,
"derived_from": "provenance/tools/build_vma23.py --detail superlow",
"unique": "One terminal material, no etch",
"source": "build_vma23.py detail level + step2glb + glb_batch.py + materials.py",
"thumb": "lod/tps16850vmar-super-low.png"
}
]
}