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Contents

README

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TPS16630RGET

Texas Instruments · Surge Protection Devices (SPDs) · VQFN-24(4x4)

TPS16630RGET from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Power supply input connected to internal FET drain.
2 IN power_in Power supply input connected to internal FET drain.
3 N.C unconnected No connection.
4 N.C unconnected No connection.
5 P_IN power_in Device power supply voltage. Always connect P_IN directly to IN.
6 UVLO input Input for setting programmable UVLO threshold; undervoltage event shuts down internal FET and asserts FLT for power fault indication.
7 OVP input Input for setting adjustable overvoltage protection threshold (TPS16630 only); overvoltage event shuts down internal FET and asserts FLT.
8 GND power_in Ground connection; connect GND to system ground plane.
9 dVdT input Capacitor between this pin and GND sets output voltage slew rate; floating pin enables thermal regulation mode for fast output charging during power-up.
10 ILIM input Resistor connected to GND on this pin sets overcurrent limit threshold; typical range 3 kΩ to 30 kΩ.
11 MODE input Mode selection pin for overload fault response; open for latch mode, shorted to GND for auto-retry mode.
12 SHDN input Shutdown pin; pulling below 0.8 V puts device into low-power shutdown mode (21 µA typ); voltage above 2 V enables device.
13 IMON output Analog current monitor output proportional to internal FET current; resistor to GND converts current to voltage (27.9 µA/A typ gain).
14 FLT output Fault event indicator with open-drain output; asserts low on UVLO, OVP, overcurrent, or thermal shutdown events.
15 N.C unconnected No connection.
16 PGOOD output Power good indicator with open-drain output, active high; goes low during fault or when SHDN is pulled low.
17 OUT power_out Device power output; source for protected load current.
18 OUT power_out Device power output; source for protected load current.
19 N.C unconnected No connection.
20 N.C unconnected No connection.
21 N.C unconnected No connection.
22 N.C unconnected No connection.
23 N.C unconnected No connection.
24 N.C unconnected No connection; PowerPAD thermal pad connects to GND plane for heat dissipation.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24(4x4)
Category Circuit Protection
Pins 25

CAD (KiCad official)

  • Symbol: TPS16630RGET
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps16630rget-etched.step / tps16630rget-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps16630rget.step / tps16630rget.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (46 pp, sha256 ef1077e8989a204c, retrieved 2026-10-01, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF