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Contents

README

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TPS16630RGER

Texas Instruments · Surge Protection Devices (SPDs) · VQFN-24(4x4)

TPS16630RGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 IN power_in Power supply input connection to drain of internal FET.
2 IN power_in Power supply input connection to drain of internal FET.
3 N.C. unconnected No connection.
4 N.C. unconnected No connection.
5 P_IN power_in Device power supply voltage; always connect P_IN directly to IN.
6 UVLO input Input to set programmable under-voltage lock-out threshold; under-voltage event disables FET and activates FLT.
7 OVP input Input to set adjustable over-voltage protection threshold (TPS16630 only); over-voltage disables FET and activates FLT.
8 GND power_in Connect GND to system ground plane.
9 dVdT bidirectional Capacitor to GND sets output voltage slew rate; leaving open enables thermal regulation mode for fast output charging.
10 ILIM bidirectional Resistor to GND sets overload current limit from 0.6A to 6A.
11 MODE input Mode selection pin for overload fault response: open = latch mode, shorted to GND = auto-retry mode.
12 SHDN input Shutdown input; pull below 0.8V for low-power shutdown; cycling above 2V resets latched faults.
13 IMON output Analog current monitor output providing proportional current to load; resistor to GND converts to proportional voltage.
14 FLT tri_state Fault event indicator, open-drain output; low during fault (UVLO, OVP, overload, thermal shutdown); keep open or tie to GND if unused.
15 N.C. unconnected No connection.
16 PGOOD tri_state Power good indicator, open-drain output, active high; goes low when FET disabled during fault or when SHDN pulled low.
17 OUT power_out Power output of device; connect to load.
18 OUT power_out Power output of device; connect to load.
19 N.C. unconnected No connection.
20 N.C. unconnected No connection.
21 N.C. unconnected No connection.
22 N.C. unconnected No connection.
23 N.C. unconnected No connection.
24 N.C. unconnected No connection.
25 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-24(4x4)
Category Circuit Protection
Pins 25

CAD (KiCad official)

  • Symbol: TPS16630RGER
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm
  • 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: tps16630rger-etched.step / tps16630rger-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps16630rger.step / tps16630rger.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (46 pp, sha256 ef1077e8989a204c, retrieved 2026-09-22, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF