TPS16630PWPR

Texas Instruments · Surge Protection Devices (SPDs) · HTSSOP-20

TPS16630PWPR from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	IN	power_in	Power supply input connected to the drain of the internal FET.
2	IN	power_in	Power supply input connected to the drain of the internal FET.
3	IN	power_in	Power supply input connected to the drain of the internal FET.
4	N.C	unconnected	No connection.
5	N.C	unconnected	No connection.
6	P_IN	power_in	Device power supply voltage; always connect P_IN directly to IN.
7	UVLO	input	Programmable undervoltage lockout input; undervoltage event shuts down internal FET and asserts FLT to indicate power fault.
8	OVP	input	Adjustable overvoltage protection threshold input (TPS16630 only); overvoltage event shuts down internal FET and asserts FLT to indicate overvoltage fault.
9	GND	power_in	Ground connection to system ground.
10	dVdT	bidirectional	Output voltage slew rate control; capacitor to GND sets slew rate; leave floating for maximum slew rate enabling thermal regulation during power-up.
11	ILIM	bidirectional	Current limit programming input; resistor to GND sets overload current limit from 0.6 A to 6 A with ±7% accuracy.
12	MODE	input	Mode selection pin for overload fault response; open circuit for latch mode, shorted to GND for auto-retry mode.
13	SHDN	input	Shutdown control input; pull below 0.8 V for low-power shutdown, above 2 V for enable; cycling resets latched faults.
14	IMON	output	Analog current monitor output with ±6% accuracy proportional to output current; resistor to GND converts current to voltage with 27.9 µA/A gain.
15	FLT	output	Fault indicator open-drain output (active-low); asserted on undervoltage, overvoltage, overcurrent, power limit, or thermal fault conditions.
16	PGOOD	output	Power good indicator open-drain output (active-high); high when internal FET is enhanced, low when off or SHDN pulled low.
17	N.C	unconnected	No connection.
18	OUT	power_out	Power output from internal FET source with 31 mΩ on-resistance rating; rated for 6 A maximum load current.
19	OUT	power_out	Power output from internal FET source with 31 mΩ on-resistance rating; rated for 6 A maximum load current.
20	OUT	power_out	Power output from internal FET source with 31 mΩ on-resistance rating; rated for 6 A maximum load current.

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	HTSSOP-20
Category	Circuit Protection
Pins	21

CAD (KiCad official)

Symbol: TPS16630PWPR
Footprint: Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm
3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
3D model files: tps16630pwpr-etched.step / tps16630pwpr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tps16630pwpr.step / tps16630pwpr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (46 pp, sha256 ef1077e8989a204c, retrieved 2026-10-01, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TPS16630PWPR

**Texas Instruments** · Surge Protection Devices (SPDs) · HTSSOP-20

TPS16630PWPR from Texas Instruments, in a HTSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | IN | power_in | Power supply input connected to the drain of the internal FET. |
| 2 | IN | power_in | Power supply input connected to the drain of the internal FET. |
| 3 | IN | power_in | Power supply input connected to the drain of the internal FET. |
| 4 | N.C | unconnected | No connection. |
| 5 | N.C | unconnected | No connection. |
| 6 | P_IN | power_in | Device power supply voltage; always connect P_IN directly to IN. |
| 7 | UVLO | input | Programmable undervoltage lockout input; undervoltage event shuts down internal FET and asserts FLT to indicate power fault. |
| 8 | OVP | input | Adjustable overvoltage protection threshold input (TPS16630 only); overvoltage event shuts down internal FET and asserts FLT to indicate overvoltage fault. |
| 9 | GND | power_in | Ground connection to system ground. |
| 10 | dVdT | bidirectional | Output voltage slew rate control; capacitor to GND sets slew rate; leave floating for maximum slew rate enabling thermal regulation during power-up. |
| 11 | ILIM | bidirectional | Current limit programming input; resistor to GND sets overload current limit from 0.6 A to 6 A with ±7% accuracy. |
| 12 | MODE | input | Mode selection pin for overload fault response; open circuit for latch mode, shorted to GND for auto-retry mode. |
| 13 | SHDN | input | Shutdown control input; pull below 0.8 V for low-power shutdown, above 2 V for enable; cycling resets latched faults. |
| 14 | IMON | output | Analog current monitor output with ±6% accuracy proportional to output current; resistor to GND converts current to voltage with 27.9 µA/A gain. |
| 15 | FLT | output | Fault indicator open-drain output (active-low); asserted on undervoltage, overvoltage, overcurrent, power limit, or thermal fault conditions. |
| 16 | PGOOD | output | Power good indicator open-drain output (active-high); high when internal FET is enhanced, low when off or SHDN pulled low. |
| 17 | N.C | unconnected | No connection. |
| 18 | OUT | power_out | Power output from internal FET source with 31 mΩ on-resistance rating; rated for 6 A maximum load current. |
| 19 | OUT | power_out | Power output from internal FET source with 31 mΩ on-resistance rating; rated for 6 A maximum load current. |
| 20 | OUT | power_out | Power output from internal FET source with 31 mΩ on-resistance rating; rated for 6 A maximum load current. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | HTSSOP-20 |
| Category | Circuit Protection |
| Pins | 21 |

## CAD (KiCad official)

- Symbol: `TPS16630PWPR`
- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`
- 3D model: HTSSOP-20, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tps16630pwpr-etched.step` / `tps16630pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tps16630pwpr.step` / `tps16630pwpr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tps1663) (46 pp, sha256 `ef1077e8989a204c`, retrieved 2026-10-01, tier: lcsc)
- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tps16630pwpr-datasheet.pdf)