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Contents

README

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TPNUP4060AXV6T1G

TECH PUBLIC · ESD And Surge Protection (TVS/ESD) · SOT-563

TPNUP4060AXV6T1G from TECH PUBLIC, in a SOT-563. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 D1 passive ESD-protected line 1 with a 6.8 V protection diode (breakdown 6 V min to 7.8 V max at 1 mA), tied internally to the common node.
2 D2 passive ESD-protected line 2 with a 6.8 V protection diode (breakdown 6 V min to 7.8 V max at 1 mA).
3 VCC power_in VCC pin with a 16 V protection diode (breakdown 13.3 V min to 17 V max at 1 mA, 200 W peak pulse power at 8/20 µs).
4 GND power_in Ground reference for the diode array, internally connected to the other GND pin (pin 6).
5 D3 passive ESD-protected line 3 with a 6.8 V protection diode (breakdown 6 V min to 7.8 V max at 1 mA).
6 GND power_in Ground reference for the diode array, internally connected to the other GND pin (pin 4).

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-563
Category Circuit Protection
Pins 6

CAD (KiCad official)

  • Symbol: TPNUP4060AXV6T1G
  • Footprint: Package_TO_SOT_SMD:SOT-563
  • 3D model: SOT-563 (KiCad packages3D, STEP)
  • 3D model files: tpnup4060axv6t1g-etched.step / tpnup4060axv6t1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpnup4060axv6t1g.step / tpnup4060axv6t1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (4 pp, sha256 a76244cc2337b2f4, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF