TPNTK3139PT1G

TECH PUBLIC · MOSFETs · SOT-723

TPNTK3139PT1G from TECH PUBLIC, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	G	input	Gate; controls the P-channel MOSFET, with gate-source voltage rated ±12 V, threshold VGS(th) -0.5 V min to -1 V max, and ESD protection.
2	S	passive	Source; P-channel source terminal, with continuous diode forward current of -0.5 A.
3	D	passive	Drain; P-channel drain terminal, with drain-source voltage rated -20 V and continuous drain current of -0.85 A.

Key specifications

Parameter	Value
Manufacturer	TECH PUBLIC
Package	SOT-723
Category	Transistors/Thyristors
Pins	3

CAD (KiCad official)

Symbol: TPNTK3139PT1G
Footprint: Package_TO_SOT_SMD:SOT-723
3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
3D model files: tpntk3139pt1g-etched.step / tpntk3139pt1g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpntk3139pt1g.step / tpntk3139pt1g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: TECH PUBLIC datasheet (3 pp, sha256 26acf185249809f4, retrieved 2026-10-09, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

# TPNTK3139PT1G

**TECH PUBLIC** · MOSFETs · SOT-723

TPNTK3139PT1G from TECH PUBLIC, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; controls the P-channel MOSFET, with gate-source voltage rated ±12 V, threshold VGS(th) -0.5 V min to -1 V max, and ESD protection. |
| 2 | S | passive | Source; P-channel source terminal, with continuous diode forward current of -0.5 A. |
| 3 | D | passive | Drain; P-channel drain terminal, with drain-source voltage rated -20 V and continuous drain current of -0.85 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-723 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `TPNTK3139PT1G`
- Footprint: `Package_TO_SOT_SMD:SOT-723`
- 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `tpntk3139pt1g-etched.step` / `tpntk3139pt1g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `tpntk3139pt1g.step` / `tpntk3139pt1g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588913469642428416) (3 pp, sha256 `26acf185249809f4`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/tpntk3139pt1g-datasheet.pdf)