component

TPM60NB7S8

Public Made by Adom

by adom

TECH PUBLIC MOSFETs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorstpm60nb7s8factory-2.0.0extractor-text
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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 1d ago
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package.json Publish 0.1.0 · Ray 1d ago
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README.md Publish 0.1.0 · Ray 1d ago
tpm60nb7s8-etched.glb Publish 0.1.0 · Ray 1d ago
tpm60nb7s8-etched.step tpm60nb7s8: factory component page (tier=lcsc) · Ray 1d ago
tpm60nb7s8-hero.glb tpm60nb7s8: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
tpm60nb7s8-hero.overlay.json Publish 0.1.0 · Ray 1d ago
tpm60nb7s8.glb Publish 0.1.0 · Ray 1d ago
tpm60nb7s8.kicad_mod Publish 0.1.0 · Ray 1d ago
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TPM60NB7S8

TECH PUBLIC · MOSFETs · SOIC-8

TPM60NB7S8 from TECH PUBLIC, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S1 passive Source of MOSFET 1 (N-channel), shown on the top-view pin diagram and the schematic with VDS rated at 60V.
2 G1 input Gate of MOSFET 1, with gate-source voltage limited to ±20V and a threshold of 1.2V min to 2.5V max.
3 S2 passive Source of MOSFET 2 (N-channel), shown on the top-view pin diagram and the schematic with VDS rated at 60V.
4 G2 input Gate of MOSFET 2, with gate-source voltage limited to ±20V and a threshold of 1.2V min to 2.5V max.
5 D2 passive Drain of MOSFET 2, shared with pin 6, with continuous drain current of 6A and drain-source voltage of 60V.
6 D2 passive Drain of MOSFET 2, shared with pin 5, with continuous drain current of 6A and drain-source voltage of 60V.
7 D1 passive Drain of MOSFET 1, shared with pin 8, with continuous drain current of 6A and drain-source voltage of 60V.
8 D1 passive Drain of MOSFET 1, shared with pin 7, with continuous drain current of 6A and drain-source voltage of 60V.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOIC-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: TPM60NB7S8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: tpm60nb7s8-etched.step / tpm60nb7s8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpm60nb7s8.step / tpm60nb7s8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (5 pp, sha256 a682f9fb20d9670a, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF