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Generated by kicad-footprint-generator · KiCad file format 20260206
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TPM40V5NS3

TECH PUBLIC · MOSFETs · SOT-23

TPM40V5NS3 from TECH PUBLIC, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limit is ±20 V, with gate threshold voltage of 1 V min to 3 V max at VDS = VGS, ID = 250 µA.
2 S passive Source; connects to the source of the 40 V N-channel MOSFET and the anode of the body diode, with continuous drain current of 3.9 A.
3 D passive Drain; drain-source voltage limit is 40 V, continuous drain current 3.9 A and pulsed drain current 16 A.

Key specifications

Parameter Value
Manufacturer TECH PUBLIC
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: TPM40V5NS3
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: tpm40v5ns3-etched.step / tpm40v5ns3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); tpm40v5ns3.step / tpm40v5ns3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: TECH PUBLIC datasheet (5 pp, sha256 113149491e59cd59, retrieved 2026-10-10, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF